ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 275
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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16.4.5
16.4.5.1
Figure 16-3. Raising the VDDIO Power Supply
6500C–ATARM–8-Feb-11
Zero-Power Power-On
Backup Power Supply
Reset Cell output
Core Power Supply
Oscillator output
Oscillator output
22 - 42 kHz RC
vddcore_nreset
periph_nreset
Fast RC
proc_nreset
bodcore_in
Power Supply Reset
Raising the Power Supply
NRST
vr_on
Note: After “proc_nreset” rising, the core starts fecthing instructions from Flash at 4 MHz.
As soon as the voltage VDDIO rises, the RC oscillator is powered up and the zero-power power-
on reset cell maintains its output low as long as VDDIO has not reached its target voltage. Dur-
ing this time, the Supply Controller is entirely reset. When the VDDIO voltage becomes valid and
zero-power power-on reset signal is released, a counter is started for 5 slow clock cycles. This is
the time it takes for the 32 kHz RC oscillator to stabilize.
After this time, the voltage regulator is enabled. The core power supply rises and the brownout
detector provides the bodcore_in signal as soon as the core voltage VDDCORE is valid. This
results in releasing the vddcore_nreset signal to the Reset Controller after the bodcore_in signal
has been confirmed as being valid for at least one slow clock cycle.
Zero-Power POR
7 x Slow Clock Cycles
T
Regulator
ON
Voltage
3 x Slow Clock
Cycles
SAM3S Preliminary
3 x Slow Clock
Cycles
6.5 x Slow Clock
Cycles
275
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