HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 317
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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10.2
10.2.1
A block diagram of the on-chip clock pulse generator is shown in figure 10.1.
EXTAL
CKIO2
Cycle = Bcyc
CAP1
CAP2
XTAL
CKIO
MD2
MD1
MD0
FRQCR: Frequency control register
Legend:
Overview of the CPG
CPG Block Diagram
oscillator
Figure 10.1 Block Diagram of Clock Pulse Generator
Crystal
Clock frequency
control circuit
FRQCR
Clock pulse generator
(× 1, 2, 3, 4, 6)
PLL circuit 1
PLL circuit 2
CPG control unit
(× 1, 4)
Bus interface
Internal bus
STBCR: Standby control register
Rev.6.00 Mar. 27, 2009 Page 259 of 1036
Standby control
Section 10 On-Chip Oscillation Circuits
STBCR
Divider 2
Divider 1
circuit
× 1
× 1/2
× 1/3
×1/4
× 1
× 1/2
× 1/3
× 1/4
× 1/6
REJ09B0254-0600
Peripheral
clock (Pφ)
Cycle = Pcyc
Bus clock (Pφ)
Cycle = Bcyc
Standby
control
Internal
clock (Iφ)
Cycle = Icyc
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