HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 795

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 24 USB HOST Module
24.2.5
HcInterruptEnable
HcInterrutpEnable Register (H'04000410)
Each enable bit in the HcInterruptEnable register corresponds to the related interrupt bit in the
HcInterruptStatus register. The HcInterruptEnable register is used to control an event to generate a
hardware interrupt. A hardware interrupt is requested in the host bus when a bit in the
HcInterruptEnable register is set, a corresponding bit in the HcInteruptEnable register is set, and
the MasterInterrupEnable bit is set. As a result, the USBHI bit in Interrupt Request Register 3
(IRR3) of Interrupt Controller INTC is set (the USBHI bit is used in common regardless of the
content of the interrupt generation event). Therefore, the USBHI bit can be used when an interrupt
generation is detected by HCD.
Writing 1 in this register sets the corresponding bit, while writing 0 leaves the bit. When read, the
current value of this register is returned.
Rev.6.00 Mar. 27, 2009 Page 737 of 1036
REJ09B0254-0600

Related parts for HD6417727BP100BV