HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 536

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 16 Realtime Clock (RTC)
16.4
16.4.1
During the RTC count operation (RCR2 bits 0 = 1), the following registers cannot be written.
RSECCNT, RMICNT, RHRCNT, RDAYCNT, RWKCNT, RMONCNT, and RYRCNT
To write these registers, the RTC count operation should be stopped.
16.4.2
Figure 16.6 shows the periodic interrupt function setting flow.
Periodic interrupts can be generated with the period specified by the periodic interrupt enable flag
(PES) in the RTC control register (RCR2). When the time period specified by PES passed, the
periodic interrupt flag (PEF) is set to 1.
PEF is cleared to 0 when PES is set and a periodic interrupt is generated. The periodic interrupt
generation can be checked by reading this bit, but is usually checked by the interrupt function.
Rev.6.00 Mar. 27, 2009 Page 478 of 1036
REJ09B0254-0600
Usage Notes
Writing Registers During RTC Count Operation
RTC Periodic Interrupts
Figure 16.6 Periodic Interrupt Function Setting
Period set by PES passed
Set PES and clear PEF
Clears PEF
PES is set and PEF is
cleared in RCR2.
PEF is cleared to 0.

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