HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 646

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 19 Serial Communication Interface with FIFO (SCIF)
19.2.10 FIFO Data Count Set Register 2 (SCFDR2)
The SCFDR2 is a 16-bit register which indicates the number of data stored in the transmit FIFO
data register 2 (SCFTDR2) and the receive FIFO data register 2 (SCFRDR2). It indicates the
number of transmit data in the SCFTDR2 with the upper eight bits, and the number of receive data
in the SCFRDR2 with the lower eight bits. The SCFDR2 is always read from the CPU.
The SCFDR2 indicates the number of non-transmitted data stored in the SCFTDR2. The H'00
means no transmit data, and the H'10 means that the full of transmit data are stored in the
SCFTDR2.
The SCFDR2 indicates the number of receive data stored in the SCFRDR2. The H'00 means no
receive data, and the H'10 means that the full of receive data are stored in the SCFRDR2.
Rev.6.00 Mar. 27, 2009 Page 588 of 1036
REJ09B0254-0600
Upper 8 Bits:
Lower 8 Bits:
Initial value:
Initial value:
R/W:
R/W:
15
R
R
0
7
0
14
R
R
0
6
0
13
R
R
0
5
0
R4
12
T4
R
R
0
4
0
R3
T3
11
R
R
0
3
0
R2
T2
10
R
R
0
2
0
R1
T1
R
R
0
1
0
9
R0
T0
R
R
8
0
0
0

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