HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 974

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 31 User-Debugging Interface (H-UDI)
should be input. In ASE mode, boundary scan and emulator functions can be used. Hold the input
level to the ASEMD0 pin for at least one cycle after the RESETP pin is negated.
ASEBRKAK: Dedicated emulator pin.
31.2.2
Figure 31.1 shows the block diagram of the H-UDI.
31.3
The H-UDI has the following registers.
• SDIR: instruction register
• SDID: device identification register
• SDBSR: boundary-scan register
Rev.6.00 Mar. 27, 2009 Page 916 of 1036
REJ09B0254-0600
Block Diagram
Register Descriptions
TRST
TDO
TMS
TCK
TDI
Figure 31.1 H-UDI Block Diagram
TAP controller
MUX
Decoder
SDIR
SDID
Local
bus

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