HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 405
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
- Current page: 405 of 907
- Download datasheet (6Mb)
Output pin
Output pin
Figure 10.42 Changing a General Register Setting by Buffer Transfer (Example 2)
Figure 10.41 Changing a General Register Setting by Buffer Transfer (Caution 2)
General register settings outside the counting range (H'0000 to GRA3)
Waveforms with a duty cycle of 0% or 100% can be output by setting a general register to
a value outside the counting range. When a buffer register is set to a value outside the
counting range, then later restored to a value within the counting range, the counting
direction (up or down) must be the same both times. See figure 10.42.
Settings can be made in this way by detecting GRA3 compare match or TCNT4 underflow
before writing to the buffer register. They can also be made by using GRA3 compare match
to activate the DMAC.
H'0000
GRA3
H'FFFF
H'0000
GR
GR
BR
T – 1
T
TCNT4
Write during down-counting
0% duty cycle
TCNT3
Write during up-counting
Section 10 16-Bit Integrated Timer Unit (ITU)
Rev. 7.00 Sep 21, 2005 page 379 of 878
100% duty cycle
Illegal changes
REJ09B0259-0700
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