HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 550
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
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Section 14 Smart Card Interface
14.3.6
Initialization: Before transmitting or receiving data, initialize the smart card interface by the
procedure below. Initialization is also necessary when switching from transmit mode to receive
mode or from receive mode to transmit mode.
1. Clear the TE and RE bits to 0 in the serial control register (SCR).
2. Clear the ERS, PER, and ORER error flags to 0 in the serial status register (SSR).
3. Set the parity mode bit (O/E) and baud rate generator clock source select bits (CKS1 and
4. Set the SMIF, SDIR, and SINV bits as required in the smart card mode register (SMR). When
5. Set a value corresponding to the desired bit rate in the bit rate register (BRR).
6. Set clock enable bit 0 (CKE0) as required in the serial control register (SCR). Write 0 in the
7. Wait for at least the interval required to transmit or receive one bit, then set the TIE, RIE, TE,
Transmitting Serial Data: The transmitting procedure in smart card mode is different from the
normal SCI procedure, because of the need to sample the error signal and retransmit. Figure 14.4
shows a flowchart for transmitting, and figure 14.5 shows the relation between a transmit
operation and the internal registers.
1. Initialize the smart card interface by the procedure given above in Initialization.
2. Check that the ERS error flag is cleared to 0 in SSR.
3. Check that the TEND flag is set to 1 in SSR. Repeat steps 2 and 3 until this check passes.
4. Write transmit data in TDR and clear the TDRE flag to 0. The data will be transmitted and the
5. To continue transmitting data, return to step 2.
6. To terminate transmission, clear the TE bit to 0.
This procedure may include interrupt handling and DMA transfer.
If the TIE bit is set to 1 to enable interrupt requests, when transmission is completed and the
TEND flag is set to 1, a transmit-data-empty interrupt (TXI) is requested. If the RIE bit is set to 1
Rev. 7.00 Sep 21, 2005 page 524 of 878
REJ09B0259-0700
CKS0) as required in the serial mode register (SMR). At the same time, clear the C/A, CHR,
and MP bits to 0, and set the STOP and PE bits to 1.
the SMIF bit is set to 1, the TxD
serial communication interface functions, and are placed in the high-impedance state.
TIE, RIE, TE, RE, MPIE, TEIE, and CKE1 bits. If bit CKE0 is set to 1, a serial clock will be
output from the SCK
and RE bits as necessary in SCR. Do not set TE and RE both to 1, except when performing a
loop-back test.
TEND flag will be cleared to 0.
Transmitting and Receiving Data
0
pin.
0
and RxD
0
pins switch from their I/O port functions to their
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