HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 610
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
- Current page: 610 of 907
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Section 19 Flash Memory (H8/3048F: Dual Power Supply (V
19.2
19.2.1
Table 19.2 illustrates the principle of operation of the on-chip flash memory of the H8/3048F
(dual-power supply).
Like EPROM, flash memory is programmed by applying a high gate-to-drain voltage that draws
hot electrons generated in the vicinity of the drain into a floating gate. The threshold voltage of a
programmed memory cell is therefore higher than that of an erased cell. Cells are erased by
grounding the gate and applying a high voltage to the source, causing the electrons stored in the
floating gate to tunnel out. After erasure, the threshold voltage drops. A memory cell is read like
an EPROM cell, by driving the gate to the high level and detecting the drain current, which
depends on the threshold voltage. Erasing must be done carefully, because if a memory cell is
overerased, its threshold voltage may become negative, causing the cell to operate incorrectly.
Section 19.5.6, Erasing Flowchart and Sample Program shows an optimal erase control flowchart
and sample program.
Table 19.2 Principle of Memory Cell Operation
Rev. 7.00 Sep 21, 2005 page 584 of 878
REJ09B0259-0700
Memory
cell
Memory
array
Flash Memory Overview
Flash Memory Operation
Program
Vd
Vg = V
PP
0 V
Vd
V
0 V
0 V
PP
Vs = V
Erase
PP
Open
Open
Open
PP
= 12 V))
0 V
V
0 V
PP
Read
Vd
Vg = V
0 V
CC
Vd
V
0 V
0 V
CC
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