HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 460

IC H8 MCU FLASH 128K 100-QFP

HD64F3048VTF8

Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3048VTF8

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
Section 11 Programmable Timing Pattern Controller
11.4
11.4.1
TP
DMAC, or address output is enabled, the corresponding pins cannot be used for TPC output. The
data transfer from NDR bits to DR bits takes place, however, regardless of the usage of the pin.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
11.4.2
During non-overlapping operation, the transfer of NDR bit values to DR bits takes place as
follows.
1. NDR bits are always transferred to DR bits at compare match A.
2. At compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
Figure 11.9 illustrates the non-overlapping TPC output operation.
Rev. 7.00 Sep 21, 2005 page 434 of 878
REJ09B0259-0700
TPC output pin
0
if their value is 1.
to TP
15
Usage Notes
Operation of TPC Output Pins
Note on Non-Overlapping Output
are multiplexed with ITU, DMAC, address bus, and other pin functions. When ITU,
DDR
Q
Figure 11.9 Non-Overlapping TPC Output
Q
NDER
Q
DR
C
D
Compare match A
Compare match B
Q
NDR
D
Internal
data bus

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