HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 753

• Manufacturer Part Number: HD64F3048VTF8
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048VTF8

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F3048VX8

A.1
Operand Notation
Symbol
Rd
Rs
Rn
ERd
ERs
ERn
(EAd)
(EAs)
PC
SP
CCR
N
Z
V
C
disp
+
–
÷
¬
( ), < >
Note: General registers include 8-bit registers (R0H to R7H and R0L to R7L) and 16-bit registers
(R0 to R7 and E0 to E7).
Instruction List
Description
General destination register
General register
Condition code register
General source register
General destination register (address register or 32-bit register)
General source register (address register or 32-bit register)
General register (32-bit register)
Destination operand
Source operand
Program counter
Stack pointer
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Displacement
Transfer from the operand on the left to the operand on the right, or transition from
the state on the left to the state on the right
Addition of the operands on both sides
Subtraction of the operand on the right from the operand on the left
Multiplication of the operands on both sides
Division of the operand on the left by the operand on the right
Logical AND of the operands on both sides
Logical OR of the operands on both sides
Exclusive logical OR of the operands on both sides
NOT (logical complement)
Contents of operand
Appendix A Instruction Set
Rev. 7.00 Sep 21, 2005 page 727 of 878
Appendix A Instruction Set
REJ09B0259-0700