UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 561
UPD70F3747GB-GAH-AX
Manufacturer Part Number
UPD70F3747GB-GAH-AX
Description
MCU 32BIT V850ES/HX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Hx3r
Datasheet
1.UPD70F3747GB-GAH-AX.pdf
(1106 pages)
Specifications of UPD70F3747GB-GAH-AX
Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
51
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
UPD70F3747GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
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(2) Tuning operation clearing procedure
(3) When not tuning TAA4
(4) Basic operation of TAA4 during tuning operation
To clear the tuning operation and exit the 6-phase PWM output mode, set the TAA4 and TAB0 registers using
the following procedure.
<1> Clear the TAB0CTL0.TAB0CE bit to 0 and stop the timer operation.
<2> Clear the TAA4CTL0.TAA4CE bit to 0 so that TAA4 can be separated.
<3> Stop the timer output by using the TAB0IOC0 and TAA4IOC0 registers.
<4> Clear the TAA4CTL1.TAA4SYE bit to 0 to clear the tuning operation.
Caution Manipulating (reading/writing) the other TAB0, TAA4, and TAB0 option registers is prohibited
When the match interrupt signal of TAA4 is not necessary as the conversion trigger source that starts the A/D
converter, TAA4 can be used independently as a separate timer without being tuned. In this case, the match
interrupt signal of TAA4 cannot be used as a trigger source to start A/D conversion in the 6-phase PWM output
mode. Therefore, fix the TAB0OPT2.TAB0AT2 and TAB0OPT2.TAB0AT3 bits to 0.
The other control bits can be used in the same manner as when TAA4 is tuned.
If TAA4 is not tuned, the compare registers (TAA4CCR0 and TAA4CCR1) of TAA4 are not affected by the
setting of the TAB0OPT0.TAB0CMS and TAB0OPT2.TAB0RDE bit. For the initialization procedure when TAA4
is not tuned, see (b) to (e) in 10.4.5 (1) Tuning operation starting procedure. (a) is not necessary because
it is a step used to set TAA4 for the tuning operation.
The 16-bit counter of TAA4 only counts up. The 16-bit counter is cleared by the set cycle value of the
TAB0CCR0 register and starts counting from 0000H again. The count value of this counter is the same as the
value of the 16-bit counter of TAB0 when it counts up. However, it is not the same when the 16-bit counter of
TAA4 counts down.
• When TAB0 counts up (same value)
• When TAB0 counts down (not same value)
16-bit counter of TAB0: 0000H → M (counting up)
16-bit counter of TAA4: 0000H → M (counting up)
16-bit counter of TAB0: M + 1 → 0001H (counting down)
16-bit counter of TAA4: 0000H → M (counting up)
until the TAB0CE bit is set to 1 and then the TAA4CE bit is set to 1.
CHAPTER 10 MOTOR CONTROL FUNCTION
User’s Manual U18854EJ2V0UD
559
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