UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 827

• Manufacturer Part Number: UPD70F3747GB-GAH-AX
• Description: MCU 32BIT V850ES/HX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Hx3r

Specifications of UPD70F3747GB-GAH-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Reset
Non-
maskable
Software
exception
Exception
trap
Maskable
Type
Notes 1. DP: Default priority
Interrupt
Interrupt
Exception
Exception
Interrupt
2. For the restoring in the case of INTWDT2, see 18.2.2 (2) From INTWDT2 signal.
3. n = 0H to FH
Classification DP
10
11
12
13
14
−
−
−
−
−
−
0
1
2
3
4
5
6
7
8
9
Note 1
CHAPTER 18 INTERRUPT/EXCEPTION PROCESSING FUNCTION
RESET
NMI
INTWDT2
TRAP0n
TRAP1n
ILGOP/
DBG0
INTLVIL
INTLVIH
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTP7
INTTAB0OV
INTTAB0CC0 TAB0 capture 0/compare 0 match TAB0
INTTAB0CC1 TAB0 capture 1/compare 1 match TAB0
INTTAB0CC2 TAB0 capture 2/compare 2 match TAB0
INTTAB0CC3 TAB0 capture 3/compare 3 match TAB0
Name
Table 18-4. Interrupt Source List of V850ES/HJ3 (1/4)
Note 3
Note 3
RESET pin input
Reset input by internal source
NMI pin valid edge input
WDT2 overflow
TRAP instruction
TRAP instruction
Illegal opcode/
DBTRAP instruction
Low voltage detection
(voltage under reference level)
Low voltage detection
(voltage over reference level)
External interrupt pin input edge
detection (INTP0)
External interrupt pin input edge
detection (INTP1)
External interrupt pin input edge
detection (INTP2)
External interrupt pin input edge
detection (INTP3)
External interrupt pin input edge
detection (INTP4)
External interrupt pin input edge
detection (INTP5)
External interrupt pin input edge
detection (INTP6)
External interrupt pin input edge
detection (INTP7)
TAB0 overflow
User’s Manual U18854EJ2V0UD
Trigger
RESET
Pin
WDT2
POCLVI
POCLVI
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
TAB0
Generating
Unit
−
−
−
0000H
0010H
0020H
004nH
005nH
0060H
0080H
0090H
00A0H
00B0H
00C0H
00D0H
00E0H
00F0H
0100H
0110H
0120H
0130H
0140H
0150H
0160H
Exception
Code
Note 3
Note 3
00000120H
00000000H
00000010H
00000020H
00000040H
00000050H
00000060H
00000080H
00000090H
000000A0H nextPC
000000B0H nextPC
000000C0H nextPC
000000D0H nextPC
000000E0H nextPC
000000F0H
00000100H
00000110H
00000130H
00000140H
00000150H
00000160H
Address
Handler
Undefined
nextPC
Note 2
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
nextPC
Restored
PC
LVILIC
LVIHIC
PIC0
PIC1
PIC2
PIC3
PIC4
PIC5
PIC6
PIC7
TAB0OVIC
TAB0CCIC0
TAB0CCIC1
TAB0CCIC2
TAB0CCIC3
Interrupt
Register
Control
−
−
−
−
−
−
825