UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 595
UPD70F3747GB-GAH-AX
Manufacturer Part Number
UPD70F3747GB-GAH-AX
Description
MCU 32BIT V850ES/HX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Hx3r
Datasheet
1.UPD70F3747GB-GAH-AX.pdf
(1106 pages)
Specifications of UPD70F3747GB-GAH-AX
Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
51
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
UPD70F3747GB-GAH-AX
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(6) Power-fail compare mode register (ADA0PFM)
(7) Power-fail compare threshold value register (ADA0PFT)
The ADA0PFM register is an 8-bit register that sets the power-fail compare mode.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The ADA0PFT register sets the threshold value when comparing with the A/D conversion result register nH
(ADA0CRnH).
The 8-bit data set in the ADA0PFT register is compared with the value of the ADA0CRnH register.
The ADA0PFT register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. In the select mode, the 8-bit data set to the ADA0PFT register is compared with the
ADA0PFM
ADA0PFT
2. In the scan mode, the 8-bit data set to the ADA0PFT register is compared with the
After reset: 00H
After reset:
value of the ADA0CRnH register specified by the ADA0S register. If the result matches
the condition specified by the ADA0PFC bit, the conversion result is stored in the
ADA0CRn register and the INTAD signal is generated. If it does not match, however,
the interrupt signal is not generated.
contents of the ADA0CR0H register. If the result matches the condition specified by
the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and the
INTAD signal is generated. If it does not match, however, the INTAD signal is not
generated. Regardless of the comparison result, the scan operation is continued and
the conversion result is stored in the ADA0CRn register until the scan operation is
completed. However, the INTAD signal is not generated after the scan operation has
been completed.
ADA0PFE
ADA0PFC
ADA0PFE
00H
7
0
1
0
1
7
R/W
R/W
ADA0PFC
Power-fail compare disabled
Power-fail compare enabled
Generates an interrupt request signal (INTAD) when ADA0CRnH ≥ ADA0PFT
Generates an interrupt request signal (INTAD) when ADA0CRnH < ADA0PFT
6
6
CHAPTER 13 A/D CONVERTER
Address: FFFFF205H
Address:
User’s Manual U18854EJ2V0UD
Selection of power-fail compare enable/disable
5
5
0
Selection of power-fail compare mode
FFFFF204H
4
4
0
3
3
0
2
2
0
1
1
0
0
0
0
593
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