UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 962

• Manufacturer Part Number: UPD70F3747GB-GAH-AX
• Description: MCU 32BIT V850ES/HX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Hx3r

Specifications of UPD70F3747GB-GAH-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

28.2 Debugging Without Using DCU
(RXDD0 and TXDD0) or pins for CSIB0 (SIB0, SOB0, SCKB0, and HS (PCM0)) as debug interfaces, without using
the DCU.
28.2.1 Circuit connection examples
960
The following describes how to implement an on-chip debug function using MINICUBE2 with pins for UARTD0
Notes 1. Connect TXDD0/SOB0 (transmit side) of the V850ES/Hx3 to RXD/SI (receive side) of the target
Remark See Table 28-3 for pins used when UARTD0 or CSIB0 is used for communication interface.
Figure 28-3. Circuit Connection Example When UARTD0/CSIB0 Is Used for Communication Interface
2. The V850ES/Hx3-side pin connected to this pin (FLMD0, FLMD1) can be used as an alternate-
3. This connection is designed assuming that the RESET signal is output from the N-ch open-drain
4. The circuit enclosed by broken lines is designed for flash self programming, which controls the
connector, and TXD/SO (transmit side) of the target connector to RXDD0/SIB0 (receive side) of the
V850ES/Hx3.
function pin other than while the memory is rewritten during a break in debugging, because this pin is
in Hi-Z state.
buffer (output resistance: 100 Ω or less).
FLMD0 pin via ports.
programming is not performed, a pull-down resistance for the FLMD0 pin can be within 1 to 10 kΩ.
RESET_IN
RESET_OUT
QB-MINI2
TXD/SO
RXD/SI
FLMD1
FLMD0
GND
VDD
SCK
CLK
Note 1
Note 1
Note 2
Note 2
Note 3
HS
CHAPTER 28 ON-CHIP DEBUG FUNCTION
V
DD
Use the port for inputting or outputting the high level.
User’s Manual U18854EJ2V0UD
10 kΩ
1 to 10 kΩ
1 to 10 kΩ
1 to 10 kΩ
V
V
DD
DD
1 kΩ
V
DD
3 to 10 kΩ
1 to 10 kΩ
10 kΩ
RESET signal
V
DD
100 Ω
V
V
RESET
TXDD0/SOB0
RXDD0/SIB0
SCKB0
HS (PCM0)
FLMD1
FLMD0
Port X
DD
SS
Reset circuit
V850ES/Hx3
When flash self
Note 4