MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 213

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
10.6.1 Multiplexer
10.6.2 Sample Capacitor and Buffer Amplifier
MC68HC16Y3/916Y3
USER’S MANUAL
The multiplexer selects one of 16 sources for conversion. Eight sources are internal
and eight are external. Multiplexer operation is controlled by channel selection field
CD:CA in register ADCTL1. Table 10-2 shows the different multiplexer channel sourc-
es. The multiplexer contains positive and negative stress protection circuitry. This cir-
cuitry prevents voltages on other input channels from affecting the current conversion.
Each of the eight external input channels is associated with a sample capacitor and
share a single sample buffer amplifier. After a conversion is initiated, the multiplexer
output is connected to the sample capacitor at the input of the sample buffer amplifier
for the first two ADC clock cycles of the sampling period. The sample amplifier buffers
the input channel from the relatively large capacitance of the RC DAC array.
During the second two clock cycles of a sampling period, the sample capacitor is dis-
connected from the multiplexer, and the sample buffer amplifier charges the RC DAC
array with the value stored in the sample capacitor.
During the third portion of a sampling period, both sample capacitor and buffer ampli-
fier are bypassed, and multiplexer input charges the DAC array directly. The length of
this third portion of a sampling period is determined by the value of the STS field in
ADCTL0.
Table 10-2 Multiplexer Channel Sources
[CD:CA] Value
ANALOG-TO-DIGITAL CONVERTER
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
(V
Test/Reserved
Input Source
RH
Reserved
Reserved
Reserved
Reserved
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
V
– V
V
RH
RL
RL
) / 2
MOTOROLA
10-5

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