MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 466

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

EMU — Emulation Control
T2CG — TCR2 Clock/Gate Control
STF — Stop Flag
SUPV — Supervisor/Unrestricted
PSCK — Prescaler Clock
TPU2 — TPU2 Enable
D-88
MOTOROLA
In emulation mode, the TPU2 executes microinstructions from TPUFLASH exclusive-
ly. Access to the TPUFLASH via the IMB is blocked, and the TPUFLASH is dedicated
for use by the TPU2. After reset, this bit can be written only once.
When the TPU2 module is used with a flash EEPROM, the shadow bit for bit 4 of the
flash EEPROM module configuration register (FEEMCR) for the 4-Kbyte flash block
must be set to clear the EMU bit out of reset. If the shadow bit for bit 4 of the FEEMCR
for the 4-Kbyte flash block is clear, the EMU bit is set out of reset.
When T2CG is set, the external TCR2 pin functions as a gate of the DIV8 clock (the
TPU system clock divided by eight). In this case, when the external TCR2 pin is low,
the DIV8 clock is blocked, preventing it from incrementing TCR2. When the external
TCR2 pin is high, TCR2 is incremented at the frequency of the DIV8 clock. When
T2CG is cleared, an external clock input from the TCR2 pin, which has been synchro-
nized and fed through a digital filter, increments TCR2.
This bit has no effect because the CPU16 always operates in the supervisor mode.
The TPU2 enable bit provides compatibility with the TPU. If running TPU code on the
TPU2, the microcode size should not be greater than two Kbytes and the TPU2 enable
bit should be cleared to zero. The TPU2 enable bit is write-once after reset. The reset
value is one, meaning that the TPU2 will operate in TPU2 mode.
0 = TPU2 and TPUFLASH operate normally.
1 = TPU2 and TPUFLASH operate in emulation mode.
0 = TCR2 pin used as clock source for TCR2.
1 = TCR2 pin used as gate of DIV8 clock for TCR2.
0 = TPU2 is operating.
1 = TPU2 is stopped (STOP bit has been set).
0 = f
1 = f
0 = TPU mode; zero is the TPU reset value.
1 = TPU2 mode; one is the TPU2 reset value.
sys
sys
32 is input to TCR1 prescaler.
4 is input to TCR1 prescaler.
TCR2P[1:0]
00
01
10
11
Table D-56 TCR2 Prescaler Control Bits
Divide By
Prescaler
1
2
4
8
Internal Clock
Divided By
16
32
64
8
External Clock
Divided By
1
2
4
8
MC68HC16Y3/916Y3
USER’S MANUAL