MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 414

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
LAT — Latch Control
ENPE — Enable Programming/Erase
FEE1BS[3:0] — Flash EEPROM Bootstrap Words
FEE2BS[3:0] — Flash EEPROM Bootstrap Words
FEE3BS[3:0] — Flash EEPROM Bootstrap Words
D-36
MOTOROLA
When the LAT bit is set, ERAS also determines whether a read returns the data in the
addressed location (ERAS = 1) or the address itself (ERAS = 0). ERAS cannot be
changed while ENPE = 1.
The LAT bit configures the EEPROM array for normal reads or for programming. When
LAT is cleared, the FLASH module address and data buses are connected to the IMB
address and data buses and the module is configured for normal reads. When LAT is
set, module address and data buses are connected to parallel internal latches and the
array is configured for programming or erasing.
Once LAT is set, the next write to a valid FLASH module address causes the program-
ming circuitry to latch both address and data. Unless control register shadow bits are
to be programmed, the write must be to an array address. The value of LAT cannot be
changed while ENPE = 1.
Setting the ENPE bit applies the program/erase voltage to the array. ENPE can be set
only after LAT has been set and a write to the data and address latches has occurred.
ENPE remains cleared if these conditions are not met. While ENPE is set, the LAT,
VFPE, and ERAS bits cannot be changed, and attempts to read an array location are
ignored.
The flash EEPROM bootstrap words (FEE1BS[3:0], FEE2BS[3:0], FEE3BS[3:0]) can
be used as system bootstrap vectors. When BOOT = 1 in FEExMCR during reset, the
flash module responds to program space accesses of IMB addresses $000000 to
$000006 after reset. When BOOT = 0, the flash module responds only to normal array
and register accesses. FEExBS[3:0] can be read at any time, but it can only be
changed by programming the appropriate locations. Table D-26 shows bootstrap word
addresses in program space.
0 = Programming latches disabled.
1 = Programming latches enabled.
0 = Disable program/erase voltage.
1 = Apply program/erase voltage to flash EEPROM.
FEE1BS0, FEE2BS0
FEE1BS1, FEE2BS1
FEE1BS2, FEE2BS2
FEE1BS3, FEE2BS3
Bootstrap Word
Table D-26 Bootstrap Words
Corresponding
Boot Address
$000000
$000002
$000004
$000006
Initial ZK, SK, and PC
Corresponding
Vector Content
Initial PC
Initial SP
Initial IZ
$YFF810–$YFF816
$YFF820–$YFF826
$YFF830–$YFF836
MC68HC16Y3/916Y3
USER’S MANUAL

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