MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 496

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MC68HC916Y3CFT16

Manufacturer Part Number
MC68HC916Y3CFT16
Description
IC MCU 96K FLASH 16MHZ 160-QFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet

Specifications of MC68HC916Y3CFT16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
SCIM2TRE D-9
SCIMCR 5-3, D-5
SCIMTR D-7
SCK 11-17, 11-21
SCSR 11-26, D-51
SCSRA/B 12-17, D-70
Select eight-conversion sequence mode (S8CM) D-40
Send break (SBK) 11-29, 12-21, D-51, D-70
Separate program and data space map
Sequence complete flag (SCF) D-44
Serial
Service
Set (definition) 2-9
Settling time 10-23
SFA 13-19, D-83
SFB 13-19, D-83
SGLR D-94
SHEN 5-39, D-6
Show cycle
Signal
Signature registers (RSIGHI/LO) 7-1
Signed fractions 4-6
SIMCR 10-3
Single
Single-chip integration module 2. See SCIM2 5-1
Single-chip mode 5-48
SIZ 5-24, 5-27, 5-40
SIZE 12-12
Size signals (SIZ) 5-24
MOTOROLA
I-14
software watchdog 5-17
spurious interrupt monitor 5-17
system
actual delay before SCK (equation) 11-18
baud rate (equation) 11-18
M68HC16R1 3-23
M68HC916R1 3-25
clock
communication interface (SCI) 11-1, 11-22, 12-1
communication interface (SCI). See SCI 12-13
data word 4-44
formats 11-27, 12-19
interface clock signal (DSCLK) 4-44
mode (M) bit 11-27, 12-19
peripheral interface (SPI) 12-1
peripheral interface (SPI). See SPI 12-4
shifter 11-26, 11-28, 12-20
request breakpoint flag (SRBK) D-91
enable (SHEN) 5-4, 5-39, D-6
operation 5-39
mnemonics 2-3
-channel conversions 10-10, D-42
-step mode 13-4
state of pins 5-51
block diagram (with PIT) 5-17
clock 5-4
protection 5-16
baud rate (SPBR) D-55
frequency range 4-44
block diagram 5-5
synthesizer operation 5-6
SK 4-3, 4-5
Slave select signal (SS). See SS 11-21
SLOCK D-8
Slow reference circuit 5-5
SM 4-4, 14-9, D-3
Soft reset control field (SOFT_RST) D-95
SOFT_RST D-95
Software watchdog 5-17
Source voltage level (VSRC) 10-23
SP 4-3
SPACE (address space select) 5-66, D-22
SPBR D-55
SPCR 12-6, D-72
SPCR0 D-54
SPCR1 D-56
SPCR2 D-57
SPCR3 D-58
SPDR 12-6, D-74
SPE 11-7, D-56
SPI 12-1
SPI finished interrupt enable (SPIFIE) D-57
SPIF D-59, D-73
SPIFIE D-57
SPSR 12-6, D-58, D-73
SPWM 14-8
SRAM
encoding 5-24
block diagram 5-19
clock rate 5-18
enable (SWE) 5-17, D-13
prescale (SWP) 5-18, D-13
ratio of SWP and SWT bits 5-18
reset (SW) D-9
timeout period calculation 5-18, D-14
timing field (SWT) 5-18, D-13
block diagram 12-5
clock phase/polarity controls 12-9
finished flag (SPIF) D-73
interrupt level (ILSPI) D-65
mode fault 12-12
operating modes
pins 12-7
registers
serial clock baud rate 12-11
timing A-26
transfer 12-6
transfer size and direction 12-12
write collision 12-12
address map D-25
array address mapping 6-1
features 3-1
normal access 6-2
registers
master mode 12-7
slave mode 12-8
control register (SPCR) 12-6, D-72
data register (SPDR) 12-6, D-74
status register (SPSR) 12-6, D-73
— master, CPHA = 0/CPHA = 1 A-27
— slave, CPHA = 0/CPHA = 1 A-28
MC68HC16Y3/916Y3
USER’S MANUAL

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