MC68HC916Y3CFT16 Freescale Semiconductor, MC68HC916Y3CFT16 Datasheet - Page 71

• Manufacturer Part Number: MC68HC916Y3CFT16
• Description: IC MCU 96K FLASH 16MHZ 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC916Y3CFT16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

4.6.1 Immediate Addressing Modes
MC68HC16Y3/916Y3
USER’S MANUAL
All modes generate ADDR[15:0]. This address is combined with ADDR[19:16] from an
operand or an extension field to form a 20-bit effective address.
In the immediate modes, an argument is contained in a byte or word immediately
following the instruction. For IMM8 and IMM16 modes, the effective address is the
address of the argument.
There are three specialized forms of IMM8 addressing.
• The AIS, AIX, AIY, AIZ, ADDD, and ADDE instructions decrease execution time
• The MAC and RMAC instructions use an 8-bit immediate operand to specify two
by sign-extending the 8-bit immediate operand to 16 bits, then adding it to an
appropriate register.
signed 4-bit index register offsets.
Post-Modified Index
Accumulator Offset
Access across 64-Kbyte address boundaries is transparent. AD-
DR[19:16] of the effective address are changed to make an access
across a bank boundary. Extension field values will not change as a
result of effective address computation.
Indexed 16-Bit
Indexed 20-Bit
Indexed 8-Bit
Immediate
Extended
Inherent
Relative
Mode
Table 4-1 Addressing Modes
Mnemonic
IND16, X
IND16, Y
IND20, X
IND20, Y
IND16, Z
IND20, Z
IND8, X
IND8, Y
IND8, Z
EXT20
IMM16
REL16
IMM8
REL8
EXT
INH
E,X
E,Y
E,Z
IXP
NOTE
Index register X with accumulator E offset
Index register Y with accumulator E offset
Index register Z with accumulator E offset
Extended
20-bit extended
8-bit immediate
16-bit immediate
Index register X with unsigned 8-bit offset
Index register Y with unsigned 8-bit offset
Index register Z with unsigned 8-bit offset
Index register X with signed 16-bit offset
Index register Y with signed 16-bit offset
Index register Z with signed 16-bit offset
Index register X with signed 20-bit offset
Index register Y with signed 20-bit offset
Index register Z with signed 20-bit offset
Inherent
Signed 8-bit offset added to index register
X after effective address is used
8-bit relative
16-bit relative
Description
MOTOROLA
4-9