MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 52

• Manufacturer Part Number: MRF24J40-I/ML
• Description: IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
• Manufacturer: Microchip Technology

Specifications of MRF24J40-I/ML

• Package / Case: 40-QFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ISM, ZigBee™
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 18mA
• Current - Transmitting: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4 Wire SPI
• Noise Figure: 8 dB
• Output Power: + 0 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 22 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 2-44:
DS39776C-page 52
MRF24J40
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1-0
Note 1:
R-0
r
Battery low-voltage threshold (BATTH) value set in the RFCON5 (0X205<7:4>) register and the Battery
Monitor Enable (BATEN) bit located in the RFCON6 (0x206<3>) register.
Reserved: Read as ‘0’
UPSECERR: MIC Error in Upper Layer Security Mode bit
1 = MIC error occurred. Write ‘1’ to clear
0 = MIC error did not occur
BATIND: Battery Low-Voltage Indicator bit
1 = Supply voltage is lower than battery low-voltage threshold
0 = Supply voltage is greater than battery low-voltage threshold
Reserved: Maintain as ‘0’
SECDECERR: Security Decryption Error
1 = Security decryption error occurred
0 = Security decryption error did not occur
Reserved: Maintain as ‘0’
UPSECERR
R/W-0
RXSR: RX MAC STATUS REGISTER (ADDRESS: 0x30)
r = reserved
W = Writable bit
‘1’ = Bit is set
BATIND
R-0
(1)
R-0
r
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
R-0
r
SECDECERR
R-0
x = Bit is unknown
© 2010 Microchip Technology Inc.
R-0
r
R/W-0
r
bit 0