MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 54

• Manufacturer Part Number: MRF24J40-I/ML
• Description: IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
• Manufacturer: Microchip Technology

Specifications of MRF24J40-I/ML

• Package / Case: 40-QFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ISM, ZigBee™
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 18mA
• Current - Transmitting: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4 Wire SPI
• Noise Figure: 8 dB
• Output Power: + 0 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 22 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 2-46:
DS39776C-page 54
MRF24J40
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-1
SLPIE
SLPIE: Sleep Alert Interrupt Enable bit
1 = Disables the Sleep alert interrupt (default)
0 = Enables the Sleep alert interrupt
WAKEIE: Wake-up Alert Interrupt Enable bit
1 = Disables the wake-up alert interrupt (default)
0 = Enables the wake-up alert interrupt
HSYMTMRIE: Half Symbol Timer Interrupt Enable bit
1 = Disables the half symbol timer interrupt (default)
0 = Enables the half symbol timer interrupt
SECIE: Security Key Request Interrupt Enable bit
1 = Disables the security key request interrupt (default)
0 = Enable security key request interrupt
RXIE: RX FIFO Reception Interrupt Enable bit
1 = Disables the RX FIFO reception interrupt (default)
0 = Enables the RX FIFO reception interrupt
TXG2IE: TX GTS2 FIFO Transmission Interrupt Enable bit
1 = Disables the TX GTS2 FIFO transmission interrupt (default)
0 = Enables the TX GTS2 FIFO transmission interrupt
TXG1IE: TX GTS1 FIFO Transmission Interrupt Enable bit
1 = Disables the TX GTS1 FIFO transmission interrupt (default)
0 = Enables the TX GTS1 FIFO transmission interrupt
TXNIE: TX Normal FIFO Transmission Interrupt Enable bit
1 = Disables the TX Normal FIFO transmission interrupt (default)
0 = Enables the TX Normal FIFO transmission interrupt
WAKEIE
R/W-1
INTCON: INTERRUPT CONTROL REGISTER (ADDRESS: 0x32)
W = Writable bit
‘1’ = Bit is set
HSYMTMRIE
R/W-1
SECIE
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
RXIE
TXG2IE
R/W-1
© 2010 Microchip Technology Inc.
x = Bit is unknown
TXG1IE
R/W-1
R/W-1
TXNIE
bit 0