MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 90

• Manufacturer Part Number: MRF24J40-I/ML
• Description: IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
• Manufacturer: Microchip Technology

Specifications of MRF24J40-I/ML

• Package / Case: 40-QFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ISM, ZigBee™
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 18mA
• Current - Transmitting: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4 Wire SPI
• Noise Figure: 8 dB
• Output Power: + 0 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 22 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.2
Certain control register values must be initialized for
basic operations. These values differ from the
Power-on Reset values and provide improved opera-
tional parameters. These settings are normally made
once after a Reset. After initialization, MRF24J40
features can be configured for the application. The
steps for initialization are shown in Example 3-1.
EXAMPLE 3-1:
TABLE 3-2:
DS39776C-page 90
MRF24J40
0x201 RFCON1
0x202 RFCON2
0x206 RFCON6
0x207 RFCON7
0x208 RFCON8
0x220 SLPCON1
Addr.
0x2A SOFTRST
0x2E TXSTBL
0x18 PACON2
Example steps to initialize the MRF24J40:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. SLPCON1 (0x220) = 0x21 – Initialize CLKOUTEN = 1 and SLPCLKDIV = 0x01.
Configuration for nonbeacon-enabled devices (see Section 3.8 “Beacon-Enabled and Nonbeacon-Enabled
Networks”):
11. BBREG2 (0x3A) = 0x80 – Set CCA mode to ED.
12. CCAEDTH = 0x60 – Set CCA ED threshold.
13. BBREG6 (0x3E) = 0x40 – Set appended RSSI value to RXFIFO.
14. Enable interrupts – See Section 3.3 “Interrupts”.
15. Set channel – See Section 3.4 “Channel Selection”.
16. Set transmitter power - See “REGISTER 2-62: RF CONTROL 3 REGISTER (ADDRESS: 0x203)”.
17. RFCTL (0x36) = 0x04 – Reset RF state machine.
18. RFCTL (0x36) = 0x00.
19. Delay at least 192 μs.
Note:
SOFTRST (0x2A) = 0x07 – Perform a software Reset. The bits will be automatically cleared to ‘0’ by hardware.
PACON2 (0x18) = 0x98 – Initialize FIFOEN = 1 and TXONTS = 0x6.
TXSTBL (0x2E) = 0x95 – Initialize RFSTBL = 0x9.
RFCON0 (0x200) = 0x03 – Initialize RFOPT = 0x03.
RFCON1 (0x201) = 0x01 – Initialize VCOOPT = 0x02.
RFCON2 (0x202) = 0x80 – Enable PLL (PLLEN = 1).
RFCON6 (0x206) = 0x90 – Initialize TXFIL = 1 and 20MRECVR = 1.
RFCON7 (0x207) = 0x80 – Initialize SLPCLKSEL = 0x2 (100 kHz Internal oscillator).
RFCON8 (0x208) = 0x10 – Initialize RFVCO = 1.
Name
Initialization
Maintain 0x200<3:0> = 0x03
SLPCLKSEL1 SLPSCKSEL0
REGISTERS ASSOCIATED WITH INITIALIZATION
VCOOPT7
RFSTBL3
FIFOEN
PLLEN
TXFIL
Bit 7
INITIALIZING THE MRF24J40
r
r
r
VCOOPT6
RFSTBL2
Bit 6
r
r
r
r
r
r
CLKOUTEN SLPCLKDIV4 SLPCLKDIV3 SLPCLKDIV2 SLPCLKDIV1 SLPCLKDIV0
VCOOPT5
TXONTS3
RFSTBL1
Bit 5
r
r
r
r
r
Preliminary
20MRECVR
VCOOPT4
TXONTS2
RFSTBL0
RFVCO
Bit 4
r
r
r
VCOOPT3
TXONTS1
MSIFS3
BATEN
Bit 3
r
r
r
r
VCOOPT2
TXONTS0
RSTPWR
MSIFS2
Bit 2
r
r
r
r
© 2010 Microchip Technology Inc.
VCOOPT1
TXONT8
MSIFS1
RSTBB
Bit 1
r
r
r
r
VCOOPT0
RSTMAC
TXONT7
MSIFS0
Bit 0
r
r
r
r