MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 73

IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN

MRF24J40-I/ML

Manufacturer Part Number
MRF24J40-I/ML
Description
IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
Manufacturer
Microchip Technology
Datasheets

Specifications of MRF24J40-I/ML

Package / Case
40-QFN
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4
Applications
ISM, ZigBee™
Power - Output
0dBm
Sensitivity
-95dBm
Voltage - Supply
2.4 V ~ 3.6 V
Current - Receiving
18mA
Current - Transmitting
18mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2.4 GHz
Interface Type
4 Wire SPI
Noise Figure
8 dB
Output Power
+ 0 dBm
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
Maximum Supply Current
22 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MRF24J40-I/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
MRF24J40-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
REGISTER 2-78:
REGISTER 2-79:
© 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
MAINCNT15 MAINCNT14 MAINCNT13 MAINCNT12 MAINCNT11 MAINCNT10
MAINCNT7
R/W-0
R/W-0
Sleep Clock (SLPCLK) period depends on the Sleep Clock Selection (SLPCLKSEL) RFCON<7:6> and
Sleep Clock Divisor (SLPCLKDIV) CLKCON<4:0> bits.
Sleep Clock (SLPCLK) period depends on the Sleep Clock Selection (SLPCLKSEL) RFCON<7:6> and
Sleep Clock Divisor (SLPCLKDIV) CLKCON<4:0> bits.
MAINCNT<7:0>: Main Counter bits
Main counter is a 26-bit counter. Together with the remain counter times events: Beacon Interval (BI)
and inactive period for beacon-enabled devices and Sleep interval for nonbeacon-enabled devices.
Units: SLPCLK.
MAINCNT<15:8>: Main Counter bits
Main counter is a 26-bit counter. Together with the remain counter times events: Beacon Interval (BI)
and inactive period for beacon-enabled devices and Sleep interval for nonbeacon-enabled devices.
Units: SLPCLK.
MAINCNT6
R/W-0
R/W-0
MAINCNT0: MAIN COUNTER 0 REGISTER (ADDRESS: 0x226)
MAINCNT1: MAIN COUNTER 1 REGISTER (ADDRESS: 0x227)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
(1)
(1)
MAINCNT5
R/W-0
R/W-0
MAINCNT4
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MAINCNT3
R/W-0
R/W-0
MAINCNT2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
MAINCNT1
MAINCNT9
MRF24J40
R/W-0
R/W-0
DS39776C-page 73
MAINCNT0
MAINCNT8
R/W-0
R/W-0
bit 0
bit 0

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