AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 128

• Manufacturer Part Number: AFS250-FGG256
• Description: FPGA - Field Programmable Gate Array 250K System Gates
• Manufacturer: Actel

Specifications of AFS250-FGG256

• Processor Series: AFS250
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 114
• Data Ram Size: 36864
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 250 K
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device Architecture
2- 11 2
Terminology
Conversion time is the interval between the release of the hold state (imposed by the input circuitry of a
track-and-hold) and the instant at which the voltage on the sampling capacitor settles to within one LSB
of a new input value.
For an ideal ADC, the analog-input levels that trigger any two successive output codes should differ by
one LSB (DNL = 0). Any deviation from one LSB in defined as DNL
Figure 2-87 • Differential Non-Linearity (DNL)
ENOB specifies the dynamic performance of an ADC at a specific input frequency and sampling rate. An
ideal ADC’s error consists only of quantization of noise. As the input frequency increases, the overall
noise (particularly in the distortion components) also increases, thereby reducing the ENOB and SINAD
(also see “Signal-to-Noise and Distortion Ratio (SINAD)”.) ENOB for a full-scale, sinusoidal input
waveform is computed using
Full-scale error is the difference between the actual value that triggers that transition to full-scale and the
ideal analog full-scale transition value. Full-scale error equals offset error plus gain error.
Conversion Time
DNL – Differential Non-Linearity
ENOB – Effective Number of Bits
FS Error – Full-Scale Error
Error = –0.5 LSB
EQ
21.
Input Voltage to Prescaler
ENOB
R e visio n 1
Ideal Output
=
SINAD 1.76
------------------------------------ -
6.02
Error = +1 LSB
–
Actual Output
(Figure
2-87).
EQ 21