AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 67

FPGA - Field Programmable Gate Array 250K System Gates

AFS250-FGG256

Manufacturer Part Number
AFS250-FGG256
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS250-FGG256

Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
114
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The following error indications are possible for Read operations:
In addition to data reads, users can read the status of any page in the FB by asserting PAGESTATUS
along with REN. The format of the data returned by a page status read is shown in
definition of the page status bits is shown in
Table 2-23 • Page Status Read Data Format
Table 2-24 • Page Status Bit Definition
Page Status
Bit(s)
31–8
7–4
3
2
1
0
Write Count
31
1. STATUS = '01' when a single-bit data error was detected and corrected within the block
2. STATUS = '10' when a double-bit error was detected in the block addressed (note that the error is
addressed.
uncorrected).
8
Reserved Over Threshold
7
The number of times the page addressed has been programmed/erased
Reserved; read as 0
Over Threshold indicator (see
Read Protected; read protect bit for page, which is set via the JTAG interface and
only affects JTAG operations. This bit can be overridden by using the correct user
key value.
Write Protected; write protect bit for page, which is set via the JTAG interface and
only affects JTAG operations. This bit can be overridden by using the correct user
key value.
Overwrite Protected; designates that the user has set the OVERWRITEPROTECT
bit on the interface while doing a Program operation. The page cannot be written
without first performing an Unprotect Page operation.
4
3
Table
R e v i s i o n 1
Read Protected
2-24.
the"Program Operation" section on page
2
Definition
Write Protected
Actel Fusion Family of Mixed Signal FPGAs
1
Overwrite Protected
Table
2-23, and the
0
2-48)
2- 51

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