AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 136

FPGA - Field Programmable Gate Array 250K System Gates

AFS250-FGG256

Manufacturer Part Number
AFS250-FGG256
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS250-FGG256

Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
114
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer:
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Device Architecture
Table 2-46 • Analog Channel Specifications (continued)
2- 12 0
Parameter
Temperature Monitor Using Analog Pad AT
External
Temperature
Monitor
(external diode
2N3904,
T
Internal
Temperature
Monitor
t
t
t
Notes:
1. V
2. Analog inputs used as digital inputs can tolerate the same voltage limits as the corresponding analog pad. There is no
3. V
4. An averaging of 1,024 samples (LPF setting in Analog System Builder) is required and the maximum capacitance
5. The temperature offset is a fixed positive value.
6. The high current mode has a maximum power limit of 20 mW. Appropriate current limit resistors must be used, based on
7. When using SmartGen Analog System Builder, CalibIP is required to obtain 0 offset. For further details on CalibIP, refer
TMSHI
TMSLO
TMSSET
J
= 25°C)
reliability concern on digital inputs as long as V
allowed across the AT pins is 500 pF.
voltage on the pad.
to the "Temperature, Voltage, and Current Calibration in Fusion FPGAs" chapter of the
Guide.
RSM
IND
is limited to V
is the maximum voltage drop across the current sense resistor.
4
Commercial Temperature Range Conditions, T
Typical: VCC33A = 3.3 V, VCC = 1.5 V
Resolution
Offset
Accuracy
External Sensor Source
Current
Max Capacitance on AT
pad
Resolution
Offset
Accuracy
Strobe High time
Strobe Low time
Settling time
CC33A
5
5
Description
+ 0.2 to allow reaching 10 MHz input frequency.
8-bit ADC
10-bit ADC
12-bit ADC
AFS090, AFS250
AFS600, AFS1500
uncalibrated
AFS600, AFS1500 calibrated
High level, TMSTBx = 0
Low level, TMSTBx = 1
8-bit ADC
10-bit ADC
12-bit ADC
AFS090, AFS250
AFS600, AFS1500
uncalibrated
AFS600, AFS1500 calibrated
IND
does not exceed these limits.
Condition
7
7
R e visio n 1
J
= 85°C (unless noted otherwise),
7
7
Min.
0.25
10
11
4
1
5
0
5
5
Typ.
100
±3
10
±3
Fusion FPGA Fabric User’s
0.25
11
4
1
5
0
Max.
105
1.3
±5
±5
Units
µA
°C
°C
°C
°C
°C
°C
°C
µA
nF
°C
°C
°C
°C
°C
°C
°C
µs
µs
µs

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