AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 137
AFS250-FGG256
Manufacturer Part Number
AFS250-FGG256
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet
1.AFS600-PQG208.pdf
(330 pages)
Specifications of AFS250-FGG256
Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
114
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
Company:
Part Number:
AFS250-FGG256
Manufacturer:
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Quantity:
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Part Number:
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Table 2-46 • Analog Channel Specifications (continued)
Parameter
Digital Input using Analog Pads AV, AC and AT
V
V
V
V
V
F
I
I
t
Gate Driver Output Using Analog Pad AG
V
I
I
F
Notes:
1. V
2. Analog inputs used as digital inputs can tolerate the same voltage limits as the corresponding analog pad. There is no
3. V
4. An averaging of 1,024 samples (LPF setting in Analog System Builder) is required and the maximum capacitance
5. The temperature offset is a fixed positive value.
6. The high current mode has a maximum power limit of 20 mW. Appropriate current limit resistors must be used, based on
7. When using SmartGen Analog System Builder, CalibIP is required to obtain 0 offset. For further details on CalibIP, refer
STBDIN
DYNDIN
INDIN
G
OFFG
IND
HYSDIN
IHDIN
ILDIN
MPWDIN
DIN
G
G
reliability concern on digital inputs as long as V
allowed across the AT pins is 500 pF.
voltage on the pad.
to the "Temperature, Voltage, and Current Calibration in Fusion FPGAs" chapter of the
Guide.
2,3
RSM
IND
is limited to V
is the maximum voltage drop across the current sense resistor.
Commercial Temperature Range Conditions, T
Typical: VCC33A = 3.3 V, VCC = 1.5 V
Input Voltage
Hysteresis
Input High
Input Low
Minimum Pulse With
Maximum Frequency
Input Leakage Current
Dynamic Current
Input Delay
Voltage Range
Output Current Drive
Maximum Off Current
Maximum switching rate
CC33A
Description
+ 0.2 to allow reaching 10 MHz input frequency.
Refer to
Refer to
High Current Mode
Low Current Mode: ±1 µA
Low Current Mode: ±3 µA
Low Current Mode: ± 10 µA
Low Current Mode: ± 30 µA
High Current Mode
kΩ resistive load
Low Current Mode:
±1 µA, 3 MΩ resistive load
Low Current Mode:
±3 µA, 1 MΩ resistive load
Low Current Mode:
±10 µA, 300 kΩ resistive load
Low Current Mode:
±30 µA, 105 kΩ resistive load
IND
does not exceed these limits.
Table 3-2 on page 3-3
Table 3-2 on page 3-3
Condition
R e v i s i o n 1
J
= 85°C (unless noted otherwise),
6
6
at 1.0 V
at 1.0 V, 1
Actel Fusion Family of Mixed Signal FPGAs
Min.
21.0
0.8
2.0
7.4
50
Typ.
27.0
0.3
1.2
0.9
1.0
2.7
9.0
1.3
20
10
25
78
Fusion FPGA Fabric User’s
2
3
7
Max.
32.0
11.5
±20
100
1.3
3.3
10
Units
MHz
MHz
KHz
KHz
KHz
KHz
mA
µA
µA
µA
µA
µA
µA
nA
2- 121
ns
ns
V
V
V
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