AFS250-FGG256 Actel, AFS250-FGG256 Datasheet - Page 69

• Manufacturer Part Number: AFS250-FGG256
• Description: FPGA - Field Programmable Gate Array 250K System Gates
• Manufacturer: Actel

Specifications of AFS250-FGG256

• Processor Series: AFS250
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 114
• Data Ram Size: 36864
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 250 K
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 2-42 • FB Unprotected Page Waveform
Figure 2-43 • FB Discard Page Waveform
UNPROTECTPAGE
DISCARDPAGE
Unprotect Page Operation
An Unprotect Page operation will clear the protection for a page addressed on the ADDR input. It is
initiated by setting the UNPROTECTPAGE signal on the interface along with the page address on
ADDR.
If the page is not in the Page Buffer, the Unprotect Page operation will copy the page into the Page
Buffer. The Copy Page operation occurs only if the current page in the Page Buffer is not Page Loss
Protected.
The waveform for an Unprotect Page operation is shown in
STATUS[1:0]
The Unprotect Page operation can incur the following error conditions:
Discard Page Operation
If the contents of the modified Page Buffer have to be discarded, the DISCARDPAGE signal should be
asserted. This command results in the Page Buffer being marked as unmodified.
The timing for the operation is shown in
operation has completed.
ADDR[17:0]
BUSY
1. If the copy of the page to the Page Buffer determines that the page has a single-bit correctable
2. If the address on ADDR does not match the address of the Page Buffer, PAGELOSSPROTECT
3. If the copy of the page to the Page Buffer determines that at least one block in the page has a
CLK
BUSY
error in the data, it will report a STATUS = '01'.
is asserted, and the Page Buffer has been modified, then STATUS = '11' and the addressed page
is not loaded into the Page Buffer.
double-bit uncorrectable error, STATUS = '10' and the Page Buffer will contain the corrupted
data.
CLK
Page
Figure
R e v i s i o n 1
2-43. The BUSY signal will remain asserted until the
Figure
Actel Fusion Family of Mixed Signal FPGAs
2-42.
Valid
2- 53