IPR-FFT Altera, IPR-FFT Datasheet - Page 43

• Manufacturer Part Number: IPR-FFT
• Description: IP CORE Renewal Of IP-FFT
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FFT

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Features: Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Fast Fourier Transform Processor
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 3: Functional Description
I/O Data Flow Architectures
Figure 3–7. FFT Behavior When sink_valid is Deasserted
© December 2010 Altera Corporation
source_valid
Output Data
To change direction on a block-by-block basis, assert or de-assert inverse
(appropriately) simultaneously with the application of the sink_sop pulse
(concurrent with the first input data sample of the block). When the FFT has
completed the transform of the input block, it asserts source_valid and outputs the
complex transform domain data block. The FFT function asserts the source_sop to
indicate the first output sample. The order of the output data depends on the output
order that you select in IP Toolbench. The output of the FFT may be in natural order or
bit-reversed order.
bit-reversed. If the output order is natural order, data flow control remains the same,
but the order of samples at the output is in sequential order 1..N.
Figure 3–6. Output Flow Control—Bit Reversed Order
Enabling the Variable Streaming FFT
The FFT processes data when there is valid data transferred to the module
(sink_valid asserted).
de-asserted.
When sink_valid is de-asserted during a frame, the FFT stalls and no data is
processed until sink_valid is reasserted. This implies that any previous frames that
are still in the FFT also stall.
If sink_valid is de-asserted between frames, the data currently in the FFT continues
to be processed and transferred to the output.
when sink_valid is de-asserted between frames and within a frame.
The FFT may optionally be disabled by deasserting the clk_en signal.
Input Data
sink_valid
Clock
but the output continues
source_ready
source_imag
source_valid
The input data stops,
source_sop
source_eop
source_real
clock
Frame 1
Figure 3–6
x0
x0
Figure 3–7
x512
x512
shows the output flow control when the output order is
x256
x256
shows the FFT behavior when sink_valid is
Frame 2
x768
x768
When the FFT is stopped within
a frame, the output pauses
x128
x128
Figure 3–7
x640
x640
x384 x896
x384
shows the FFT behavior
x896
FFT MegaCore Function User Guide
x1023
x1023
3–9