IPR-FFT Altera, IPR-FFT Datasheet - Page 54

• Manufacturer Part Number: IPR-FFT
• Description: IP CORE Renewal Of IP-FFT
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-FFT

• Software Application: IP CORE, DSP Filters And Transforms
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Features: Bit-Accurate MATLAB Models, Radix-4 And Mixed Radix-4/2 Implementations
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Fast Fourier Transform Processor
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

A–2
Calculating Possible Exponent Values
Implementing Scaling
FFT MegaCore Function User Guide
The output SNR depends on how many bits of right shift occur and at what stages of
the radix core computation they occur. In other words, the signal-to-noise ratio is data
dependent and you need to know the input signal to compute the SNR.
Depending on the length of the FFT/IFFT, the number of passes through the radix
engine is known and therefore the range of the exponent is known. The possible
values of the exponent are determined by the following equations:
These equations translate to the values in
Table A–1. Exponent Scaling Values for FFT / IFFT
To implement the scaling algorithm, follow these steps:
1. Determine the length of the resulting full scale dynamic range storage register. To
Note to
(1) This table lists the range of exponents, which is the number of scale events that occurred internally. For IFFT, the
(2) The maximum and minimum values show the number of times the data is shifted. A negative value indicates shifts
P = ceil{log
R = 0 if log
Single output range = (–3P+R, P+R–4)
Quad output range = (–3P+R+1, P+R–7)
get the length, add the width of the data to the number of times the data is shifted
(the max value in
Output FFT/IFFT with Max = –11 and Min = –3. The Max value indicates 11 shifts
to the left, so the resulting full scaled data width is 16 + 11, or 27 bits.
output must be divided by N externally. If more arithmetic operations are performed after this step, the division by
N must be performed at the end to prevent loss of precision.
to the left, while a positive value indicates shifts to the right.
16,384
1,024
2,048
4,096
8,192
128
256
512
64
Table
N
A–1:
2
4
N is even, otherwise R = 1
N}, where N is the transform length
P
3
4
4
5
5
6
6
7
7
Table
A–1). For example, for a 16-bit data, 256-point Quad
Max
Single Output Engine
–11
–12
–14
–15
–17
–18
–20
–21
–9
(2)
Table
Min
(Note 1)
–1
A–1.
1
0
2
1
3
2
4
3
(2)
Appendix A: Block Floating Point Scaling
© December 2010 Altera Corporation
Calculating Possible Exponent Values
Max
–10
–11
–13
–14
–16
–17
–19
–20
Quad Output Engine
–8
(2)
Min
–4
–2
–3
–1
–2
–1
0
1
0
(2)