ADV7183BBSTZ Analog Devices Inc, ADV7183BBSTZ Datasheet - Page 19

• Manufacturer Part Number: ADV7183BBSTZ
• Description: IC,TV/VIDEO CIRCUIT,Color Decoder Circuit,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7183BBSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

GLOBAL STATUS REGISTERS
Four registers provide summary information about the video
decoder. The IDENT register allows the user to identify the
revision code of the ADV7183B. The three other registers
contain status bits regarding IC operation.
IDENTIFICATION
IDENT[7:0] Address 0x11[7:0]
This register provides identification of the revision of the
ADV7183B.
An identification value of 0x11 indicates the ADV7183, released
silicon.
An identification value of 0x13 indicates the ADV7183B silicon.
STATUS 1
STATUS_1[7:0] Address 0x10[7:0]
This read-only register provides information about the internal
status of the ADV7183B.
See
Lock, Address 0x51[2:0], and
Address 0x51[5:3] for information on the timing.
Depending on the setting of the FSCLE bit, the Status[0] and
Status[1] bits are based solely on horizontal timing information
on the horizontal timing and lock status of the color subcarrier.
See the
AUTODETECTION RESULT
AD_RESULT[2:0] Address 0x10[6:4]
The AD_RESULT[2:0] bits report back on the findings from the
autodetection block. For more information on enabling the
autodetection block, see the
information on configuring it, see the
Modes section.
Table 14. AD_RESULT Function
AD_RESULT[2:0]
000
001
010
011
100
101
110
111
V S_Coast[1:0] Address 0xF9[3:2],
1 6 1 H
F SCLE FSC Lock Enable, Address 0x51[7] section.
1 6 4 H
G eneral Setup section. For
1 6 5 H
C OL[2:0] Count Out-of-Lock,
1 6 3 H
Description
NTSM-MJ
NTSC-443
PAL-M
PAL-60
PAL-BGHID
SECAM
PAL-Combination N
SECAM 525
A utodetection of SD
1 6 6 H
C IL[2:0] Count Into
1 6 2 H
Rev. B | Page 19 of 100
Table 15. STATUS 1 Function
STATUS 1[7:0]
0
1
2
3
4
5
6
7
STATUS 2
STATUS_2[7:0], Address 0x12[7:0]
Table 16. STATUS 2 Function
STATUS 2[7:0]
0
1
2
3
4
5
6
7
STATUS 3
STATUS_3[7:0], Address 0x13[7:0]
Table 17. STATUS 3 Function
STATUS 3[7:0]
0
1
2
3
4
5
6
7
INST_HLOCK
GEMD
FREE_RUN_ACT
STD_FLD_LEN
INTERLACED
PAL_SW_LOCK
Bit Name
SD_OP_50HZ
MVCS DET
MVCS T3
MV_PS DET
MV_AGC DET
LL_NSTD
FSC_NSTD
Reserved
Reserved
Bit Name
IN_LOCK
LOST_LOCK
FSC_LOCK
FOLLOW_PW
AD_RESULT.0
AD_RESULT.1
AD_RESULT.2
COL_KILL
Bit Name
Description
In lock (right now)
Lost lock (since last read of
this register)
F
AGC follows peak white
algorithm
Result of autodetection
Result of autodetection
Result of autodetection
Color kill active
Description
Detected Macrovision color
striping
Macrovision color striping
protection. Conforms to
Type 3 if high and to Type 2
if low
Detected Macrovision
pseudo sync pulses
Detected Macrovision AGC
pulses
Line length is nonstandard
F
SC
Description
Horizontal lock indicator
(instantaneous).
Gemstar detect.
Flags whether 50 Hz or
60 Hz are present at output.
Reserved for future use.
Outputs a blue screen (see the
D EF_VAL_AUTO_EN Default
1 6 7 H
Value Automatic Enable,
Address 0x0C[1] section).
Field length is correct for
currently selected video
standard.
Interlaced video detected
(field sequence found).
Reliable sequence of swinging
bursts detected.
SC
locked (right now)
frequency is nonstandard
ADV7183B