ADV7183BBSTZ Analog Devices Inc, ADV7183BBSTZ Datasheet - Page 31

• Manufacturer Part Number: ADV7183BBSTZ
• Description: IC,TV/VIDEO CIRCUIT,Color Decoder Circuit,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7183BBSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 33. AGC Modes
Input Video Type
Any
CVBS
Y/C
YPrPb
Luma Gain
LAGC[2:0] Luma Automatic Gain Control,
Address 0x2C[7:0]
The luma automatic gain control mode bits select the mode of
operation for the gain control in the luma path.
ADI internal parameters are available to customize the peak
white gain control. Contact ADI sales for more information.
Table 34. LAGC Function
LAGC[2:0]
000
001
010 (default)
011
100
101
110
111
LAGT[1:0] Luma Automatic Gain Timing,
Address 0x2F[7:6]
The luma automatic gain timing register allows the user to
influence the tracking speed of the luminance automatic gain
control. Note that this register has an effect only if the
LAGC[2:0] register is set to 001, 010, 011, or 100 (automatic
gain control modes).
If peak white AGC is enabled and active (see the
S TATUS_1[7:0] Address 0x10[7:0] section), the actual gain
1 9 1 H
update speed is dictated by the peak white AGC loop and, as a
result, the LAGT settings have no effect. As soon as the part
leaves peak white AGC, LAGT becomes relevant again.
The update speed for the peak white algorithm can be custom-
ized by the use of internal parameters. Contact ADI sales for
more information.
Description
Manual fixed gain (use LMG[11:0])
AGC (blank level to sync tip); peak white
algorithm off
AGC (blank level to sync tip); peak white
algorithm on
Reserved
Reserved
Reserved
Reserved
Freeze gain
Luma Gain
Manual gain luma
Dependent on horizontal sync depth
Peak white
Dependent on horizontal sync depth
Peak white
Dependent on horizontal sync depth
Rev. B | Page 31 of 100
Table 35. LAGT Function
LAGT[1:0]
00
01
10
11 (default)
LG[11:0] Luma Gain, Address 0x2F[3:0];
Address 0x30[7:0]; LMG[11:0] Luma Manual Gain,
Address 0x2F[3:0]; Address 0x30[7:0]
Luma gain[11:0] is a dual-function register. If written to, a
desired manual luma gain can be programmed. This gain
becomes active if the LAGC[2:0] mode is switched to manual
fixed gain. Equation 1 shows how to calculate a desired gain.
If read back, this register returns the current gain value.
Depending on the setting in the LAGC[2:0] bits, one of these
gain values is returned
•
•
Table 36. LG/LMG Function
LG[11:0]/LMG[11:0]
LMG[11:0] = X
LG[11:0]
Luma manual gain value (LAGC[2:0] set to luma manual
gain mode)
Luma automatic gain value (LAGC[2:0] set to any of the
automatic modes)
Luma
Chroma Gain
Manual gain chroma
Dependent on color burst amplitude
Taken from luma path
Dependent on color burst amplitude
Taken from luma path
Dependent on color burst amplitude
Taken from luma path
Dependent on color burst amplitude
Taken from luma path
Taken from luma path
_
Gain
=
(
0
<
Read/Write
Write
Read
Description
Slow (TC = 2 sec)
Medium (TC = 1 sec)
Fast (TC = 0.2 sec)
Adaptive
LG
2048
≤
4095
)
=
Description
Manual gain for luma
path
Actually used gain
0
...
2
ADV7183B
(1)