ADV7183BBSTZ Analog Devices Inc, ADV7183BBSTZ Datasheet - Page 82

• Manufacturer Part Number: ADV7183BBSTZ
• Description: IC,TV/VIDEO CIRCUIT,Color Decoder Circuit,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7183BBSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADV7183B
Subaddress
0x51
0x8F
0x90
0x91
0x92
0x93
0x94
0x95
0x96
Register
Lock
Count
Free Run
Line
Length 1
VBI Info
(Read Only)
WSS1
(Read Only)
WSS2
(Read Only)
WSS2
(Read Only)
EDTV2
(Read Only)
EDTV3
(Read Only)
CGMS1
(Read Only)
Bit Description
CIL[2:0]. Count-into-lock determines
the number of lines the system must
remain in lock before showing a
locked status.
COL[2:0]. Count-out-of-lock
determines the number of lines the
system must remain out-of-lock
before showing a lost-locked status.
SRLS. Select raw lock signal. Selects
the determination of the lock status.
FSCLE. Fsc lock enable.
Reserved
LLC_PAD_SEL[2:0]. Enables manual
selection of clock for LLC1 pin.
Reserved
WSSD. Screen signaling detected.
CCAPD. Closed caption data.
EDTVD. EDTV sequence.
CGMSD. CGMS sequence.
Reserved.
WSS1[7:0]
Wide screen signaling data.
WSS2[7:0]
Wide screen signaling data.
WSS2[7:0]
Wide screen signaling data.
EDTV2[7:0]
EDTV data register.
EDTV3[7:0]
EDTV data register.
CGMS1[7:0]
CGMS data register.
Rev. B | Page 82 of 100
7 6
0
1
0
x x
x x
x x
x x
x x
x x
x x
0
1
0
1
5
0
0
0
0
1
1
1
1
0
0
x
x
x
x
x
x
x
4
0
0
1
1
0
0
1
1
0
1
x
x
x
x
x
x
x
Bits
3
0
1
0
1
0
1
0
1
0
0
1
x
x
x
x
x
x
2
0
0
0
0
1
1
1
1
0
0
1
x
x
x
x
x
x
1
0
0
1
1
0
0
1
1
0
0
1
x
x
x
x
x
x
0
0
1
0
1
0
1
0
1
0
0
1
x
x
x
x
x
x
Comments
1 line of video.
2 lines of video.
5 lines of video.
10 lines of video.
100 lines of video.
500 lines of video.
1000 lines of video.
100000 lines of video.
1 line of video.
2 lines of video.
5 lines of video.
10 lines of video.
100 lines of video.
500 lines of video.
1000 lines of video.
100000 lines of video.
Over field with vertical
info.
Line-to-line evaluation.
Lock status set only by
horizontal lock.
Lock status set by
horizontal lock and
subcarrier lock.
Set to default.
LLC1 (nominal 27 MHz)
selected out on LLC1 pin.
LLC2 (nominally
13.5 MHz) selected out on
LLC1 pin.
Set to default.
No WSS detected.
WSS detected.
No CCAP signals
detected.
CCAP sequence detected.
No EDTV sequence
detected.
EDTV sequence detected.
No CGMS transition
detected.
CGMS sequence
decoded.
WSS2[7:6] are
undetermined.
EDTV3[7:6] are
undetermined.
Notes
For 16-bit 4:2:2 out,
OF_SEL[3:0] = 0010.
Read only status bits.
EDTV3[5] is reserved
for future use.