ADV7183BBSTZ Analog Devices Inc, ADV7183BBSTZ Datasheet - Page 61

• Manufacturer Part Number: ADV7183BBSTZ
• Description: IC,TV/VIDEO CIRCUIT,Color Decoder Circuit,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7183BBSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER ACCESSES
The MPU can write to or read from most of the ADV7183B’s
registers, except the registers that are read only or write only.
The subaddress register determines which register the next read
or write operation accesses. All communications with the part
through the bus start with an access to the subaddress register.
Next, a read/write operation is performed from/to the target
address, which then increments to the next address until a stop
command on the bus is performed.
REGISTER PROGRAMMING
This section describes the configuration of each register. The
communications register is an 8-bit, write only register. After
the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
the subaddress register for the control port.
Register Select (SR7 to SR0)
These bits are set up to point to the required starting address.
T able 82 lists the various operations under the control of
2 6 3 H
Rev. B | Page 61 of 100
I
An I
and is, therefore, distributed over two or more I
such as HSB[11:0].
When such a parameter is changed using two or more I
operations, the parameter can hold an invalid value for the time
between the first I
This means, the top bits of the parameter can already hold the
new value while the remaining bits of the parameter still hold
the previous value.
To avoid this problem, the I
updated bits of the parameter in local memory; all bits of the
parameter are updated together once the last register write
operation has completed.
The correct operation of the I
following:
•
•
2
C SEQUENCER
2
All I
in order of ascending addresses. For example, for
HSB[10:0], write to Address 0x34 first, followed by 0x35.
No other I
writes for the sequence. For example, for HSB[10:0], write
to Address 0x34 first, immediately followed by 0x35.
C sequencer is used when a parameter exceeds eight bits
2
C registers for the target parameter must be written to
2
C can take place between the two (or more) I
2
C completion and the last I
2
C sequencer holds the already
2
C sequencer relies on the
2
C completion.
2
ADV7183B
C registers,
2
C write
2
C