ADV7183BBSTZ Analog Devices Inc, ADV7183BBSTZ Datasheet - Page 21

• Manufacturer Part Number: ADV7183BBSTZ
• Description: IC,TV/VIDEO CIRCUIT,Color Decoder Circuit,CMOS,QFP,80PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7183BBSTZ

• Applications: Projectors, Recorders, Security
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SYNC PROCESSING
The ADV7183B extracts syncs embedded in the video data
stream. There is currently no support for external HS/VS
inputs. The sync extraction has been optimized to support
imperfect video sources such as VCRs with head switches. The
actual algorithm used employs a coarse detection based on a
threshold crossing followed by a more detailed detection using
an adaptive interpolation algorithm. The raw sync information
is sent to a line-length measurement and prediction block. The
output of this is then used to drive the digital resampling
section to ensure the ADV7183B outputs 720 active pixels per
line.
The sync processing on the ADV7183B also includes the
following specialized postprocessing blocks that filter and
condition the raw sync information retrieved from the digitized
analog video.
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VBI DATA RECOVERY
The ADV7183B can retrieve the following information from the
input video:
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The ADV7183B is also capable of automatically detecting the
incoming video standard with respect to
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The SPD can configure itself to support PAL-B/G/H/I/D,
PAL-M/N, PAL-combination N, NTSC-M, NTSC-J, SECAM
50 Hz/60 Hz, NTSC4.43, and PAL60.
Vsync Processor. This block provides extra filtering of the
detected Vsyncs to give improved vertical lock.
Hsync Processor. The Hsync processor is designed to filter
incoming Hsyncs that are corrupted by noise, providing
much improved performance for video signals with stable
time base but poor SNR.
Wide-screen signaling (WSS)
Copy generation management system (CGMS)
Closed caption (CC)
Macrovision protection presence
EDTV data
Gemstar-compatible data slicing
Color subcarrier frequency
Field rate
Line rate
Rev. B | Page 21 of 100
GENERAL SETUP
Video Standard Selection
The VID_SEL[3:0] bits allows the user to force the digital core
into a specific video standard. Under normal circumstances,
this should not be necessary. The VID_SEL[3:0] bits default to
an autodetection mode that supports PAL, NTSC, SECAM, and
variants thereof. The following section describes the autodetec-
tion system.
Autodetection of SD Modes
To guide the autodetection system, individual enable bits are
provided for each of the supported video standards. Setting the
relevant bit to 0 inhibits the standard from being detected
automatically. Instead, the system picks the closest of the
remaining enabled standards. The results of the autodetection
can be read back via the status registers. See the
Registers section for more information.
VID_SEL[3:0] Address 0x00[7:4]
Table 18. VID_SEL Function
VID_SEL
0000 (default)
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
AD_SEC525_EN Enable Autodetection of SECAM 525
Line Video, Address 0x07[7]
Setting AD_SEC525_EN to 0 (default) disables the autodetection
of a 525-line system with a SECAM style, FM-modulated color
component.
Setting AD_SEC525_EN to 1 enables the detection.
Description
Autodetect (PAL BGHID) <–> NTSC J
(no pedestal), SECAM
Autodetect (PAL BGHID) <–> NTSC M
(pedestal), SECAM
Autodetect (PAL N) (pedestal) <–> NTSC J
(no pedestal), SECAM
Autodetect (PAL N) (pedestal) <–> NTSC M
(pedestal), SECAM
NTSC-J (1)
NTSC-M (1)
PAL60
NTSC-.43 (1)
PAL-B/G/H/I/D
PAL-N (= PAL BGHID (with pedestal))
PAL-M (without pedestal)
PAL-M
PAL-Combination N
PAL COMBINATION N (with pedestal)
SECAM
SECAM (with pedestal)
ADV7183B
G lobal Status
1 6 9 H