LSISAS1068 LSI, LSISAS1068 Datasheet - Page 107

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

31
0 X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 X X 0
Register: 0x30
Host Interrupt Status
Read/Write
The Host Interrupt Status register provides read only interrupt status
information to the PCI Host. A write to this register of any value clears
the associated System Doorbell interrupt.
PCI I/O Space and Memory Space Register Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
Diagnostic Read/Write Address
This register holds the address that the
Read/Write Data
IOP Doorbell Status
The LSISAS1068 sets this bit when the IOP receives a
message from the system doorbell but has yet to process
it. The IOP processes the System Doorbell message then
clears the corresponding system request interrupt.
Reserved
This field is reserved.
Reply Interrupt
The LSISAS1068 sets this bit when the Reply Post FIFO
is not empty. The LSISAS1068 generates a PCI interrupt
when this bit is set and the corresponding mask bit in the
Host Interrupt Mask
Reserved
This field is reserved.
System Doorbell Interrupt
The LSISAS1068 sets this bit when the IOP writes a
value to the System Doorbell. The host can clear this bit
by writing any value to this register. The LSISAS1068
generates a PCI interrupt when this bit is set and the
corresponding mask bit in the
register is cleared.
Host Interrupt Status
16 15
register writes data to or reads data from.
register is cleared.
Host Interrupt Mask
8
7
Diagnostic
[31:0]
[30:4]
[2:1]
4-37
31
0
3
0