LSISAS1068 LSI, LSISAS1068 Datasheet - Page 86

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

4-16
Register: 0x3E
Minimum Grant
Read Only
Register: 0x3F
Maximum Latency
Read Only
Register: 0xXX
Power Management Capability ID
Read Only
PCI Host Register Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
7
0
7
0
7
0
1
0
0
Min_Gnt
This register specifies the desired settings for the latency
timer values in units of 0.25 s. Min_Gnt specifies how
long of a burst period the device needs. The LSISAS1068
sets this register to 0x40 indicating a burst period of
16.0 s.
Max_Lat
This register specifies the desired settings for the latency
timer values in units of 0.25 s. Max_Lat specifies how
often the device needs to gain access to the PCI bus.
The LSISAS1068 sets this register to 0x0A since it
requires the PCI bus every 2.5 s.
Power Management Capability ID
This register indicates the type of the current data
structure. It is set to 0x01 to indicate the Power
Management Data Structure.
0
0
0
Power Management Capability ID
Maximum Latency
Minimum Grant
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
[7:0]
[7:0]
[7:0]