LSISAS1068 LSI, LSISAS1068 Datasheet - Page 145

no-image

LSISAS1068

Manufacturer Part Number
LSISAS1068
Description
Manufacturer
LSI
Datasheet

Specifications of LSISAS1068

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LSISAS1068 B0
Manufacturer:
LSI
Quantity:
20 000
Company:
Part Number:
LSISAS1068 B0
Quantity:
60
Part Number:
LSISAS1068 B1
Manufacturer:
LSI
Quantity:
20 000
Part Number:
LSISAS1068B0
Manufacturer:
NS
Quantity:
4 400
Part Number:
LSISAS1068BO
Manufacturer:
ALTERA
0
Part Number:
LSISAS1068E
Manufacturer:
LSI
Quantity:
1 049
Company:
Part Number:
LSISAS1068E
Quantity:
215
Part Number:
LSISAS1068E B2
Manufacturer:
LSI
Quantity:
20 000
Part Number:
LSISAS1068E B3
Manufacturer:
LSI
Quantity:
20 000
Part Number:
LSISAS1068E B3/62095D2
Manufacturer:
LSI
Quantity:
20 000
memory read
memory requirements
memory space 2-10,
message passing technology
message queues
message signaled interrupts 2-16,
MFA
minimum grant register
MODE[5:0] 3-11, 3-18,
MOE[1:0]/
MSI 2-16, 2-17,
MSI mask bits register
MSI message address register
MSI message control register
MSI message data register
MSI message upper address register
MSI pending bits register
MSI-X 2-16,
MSI-X enable 3-16,
MSI-X message control register
MSI-X PBA offset register
MSI-X table offset register
multi-ICE
multiple cache line transfers
multiple message capable
multiple message enable
MWE[1:0]/
N
narrow port
NC
new capabilities bit
no connect
high priority request
reply
capability ID register
enable bit
mask bits
message address
message data
message upper address register
multiple message
next pointer register
pending bits
capability ID register
next pointer register
PBA offset
table offset
3-1
4-39
2-26
3-9
3-9
3-1
2-18
4-38
4-23
4-21
4-29
4-26
4-25
4-23
4-38
2-8
4-23
4-7
3-17
4-21
4-31
4-22
Index
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
2-20
4-23
5-5
4-40
4-20
4-24
4-16
4-19
4-24
4-20
4-23
4-26
4-21
4-25
4-23
2-15
2-1
4-20
4-22
4-24
2-17
4-22
4-22
NVSRAM
NVSRAM or SRAM select
NVSRAM/SRAM installed
NVSRAM_CS/
O
operating conditions
operating free air temperature
P
package drawing
PAR 3-4,
PAR64 3-4,
parity error
PBA offset
PC2001 system design guide
PCI 2-8,
33 MHz
64-bit 3-16,
66 MHz 3-16, 3-17,
66 MHz capable bit
address/data bus 3-15,
addressing
alias to memory read block command 2-13,
alias to memory write block command
arbitration
arbitration signals
benefits
bus commands
cache line size register
cache mode
CLK
command
2-14
configuration read 2-10, 2-11,
configuration write 2-10, 2-11,
dual address cycle
dual address cycles
I/O read 2-11,
I/O write
I/O write command
interrupt acknowledge 2-11,
memory read
memory read block 2-11, 2-13,
memory read command
memory read dword
memory read dword command
5-9
2-9
5-4
2-23
4-26
5-9
1-6
4-6
5-4
2-11
2-16
2-9
3-17
2-11
3-9
2-16
5-21
2-11
2-11
5-2
2-12
3-5
5-9
4-6
2-15
2-12
3-16
2-9
3-16
4-30
2-15
2-11
2-17
2-12
5-2
2-12
2-13
2-13
2-12
2-15
2-13
IX-5

Related parts for LSISAS1068