LSISAS1068 LSI, LSISAS1068 Datasheet - Page 108

• Manufacturer Part Number: LSISAS1068
• Manufacturer: LSI

Specifications of LSISAS1068

• Lead Free Status / RoHS Status: Not Compliant

4-38
31
X X X X X X X X X X X X X X X X X X X X X X 0
Register: 0x34
Host Interrupt Mask
Read/Write
The Host Interrupt Mask register masks and/or routes the interrupt
conditions that the
Table 4.9
PCI Host Register Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
Interrupt Signal Routing
Reserved
This field is reserved.
Interrupt Request Routing Mode
This field routes PCI interrupts to the INTA/ or ALT_INTA/
pins according to the bit encodings in
host system enables MSI or MSI-X, the LSISAS1068
does not signal PCI interrupts on the INTA/ or ALT_INTA/
pins.
Reserved
This field is reserved.
Reply Interrupt Mask
Setting this bit masks reply interrupts and prevents the
assertion of a PCI interrupt for all reply interrupt conditions.
Reserved
This field is reserved.
Doorbell Interrupt Mask
Setting this bit masks System Doorbell interrupts and
prevents the assertion of a PCI interrupt for all System
Doorbell interrupt conditions.
Host Interrupt Mask
Bits [9:8] Encodings
Host Interrupt Status
16 15
0b00
0b01
0b10
0b11
register reports.
Interrupt Signal Routing
INTA/ and ALT_INTA/
INTA/ Only
ALT_INTA/ Only
INTA/ and ALT_INTA/
8
0 X X X X 1 X X 1
7
Table
4.9. If the
[31:10]
[9:8]
[7:4]
[2:1]
0
3
0