PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 232

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
Table 14-11
of the PD field.
Table 14-11. ICP priority delay vs. PD code
The priority delay mechanism in interaction with the arbi-
ter mechanism allows the user to allocate enough band-
width for the ICP to do its processing in the required
frame time. For details of the arbiter mechanism see
Chapter 20, “Arbiter.”
14.6.7
Each microprogram in the microprogram set has an as-
sociated parameter table used by the ICP to process the
image data, such as the image input and output start ad-
dresses, scaling factor, etc. The DP points to the location
in SDRAM of the first word of the parameter table. The
parameter table address must be word aligned. The pa-
rameter table can be more than one SDRAM block (16
32-bit words) long.
Note: In packed RGB24 to PCI operation the output ad-
dress offset from the start of video memory must be a
multiple of 6 bytes, i.e. on an even pixel boundary.
14.6.8
This routine loads the filter coefficient RAMs with coeffi-
cient data in the parameter table. A total of 32 sets of five
10-bit coefficients are loaded. Each set of five coeffi-
cients forms a 50-bit coefficient word. Two coefficients
are stored in each 32-bit word in SDRAM. Three 32-bit
words are used for each set of five coefficients that form
a coefficient word. The parameter table is 96 words (6
SDRAM blocks) long. Each coefficient is stored as the 10
LSBs of each 16-bit half word of the 32-bit word.
The parameter table for the coefficient load function con-
tains the coefficient data directly, as shown below. The
parameter table is 96 words long.
14-22
ICP Parameter Tables
Load Coefficients
Code
1010
1001
1000
0101
0100
0010
0001
0000
1110
1101
1100
1011
0111
0110
0011
1111
PD
gives the delay in block times as a function
PRELIMINARY SPECIFICATION
block times
Delay
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
Table 14-12. Load coefficients parameter table
14.6.9
This routine performs horizontal scaling and filtering of
one component (Y, U or V) of an N x M image from one
location in SDRAM to another.
14.6.9.1
The routine reads image data from SDRAM using the Y
address counter, then scales and filters the data in the
horizontal direction and writes it back to the SDRAM us-
ing the Z address counter. The 5-tap filter scales and fil-
ters the data. The LSB Increment value supplied by the
parameter table determines the scaling. The routine
reads and writes a line at a time until the full image is
transferred. The filter mirrors the ends of each line to pro-
vide the extra pixels needed by the filter at the ends of
each line.
14.6.9.2
The parameter table, shown in
input and output starting addresses and offsets, the im-
age height in lines and width in pixels, and the increment
value, which is derived from the scale factor.
The input and output addresses are the byte addresses
of their respective tables. They do not need to be word-
or block-aligned.
The input and output line offsets define the difference in
bytes from the address of the first pixel in the first line to
the address of the first pixel in the second line for their re-
spective blocks. The line offset must be constant for all
lines in each table. The line offset allows some space be-
tween the end of one line and the start of the next line. It
also allows the ICP to scale and filter a subset of an ex-
isting image, such as magnifying a portion of an image.
There are no restrictions on line offset values other than
they must be 16-bit, two’s complement integer values.
(Note that this allows negative offsets. You can use this
to flip an image vertically.)
The input and output image height and width values are
the height in lines and width in pixels per line for their re-
Upper 2
bytes
a+2
a+0
a+2
a+0
a+2
a+0
a-2
a-2
a-2
Parameter Word
Horizontal Filter - SDRAM to SDRAM
Algorithms
Parameter table
Lower 2
bytes
a+1
a+1
a+1
a-1
a-1
a-1
0
0
0
Philips Semiconductors
RAM Coefficient word 0
RAM Coefficient word 1
RAM Coefficient word 31
Table
Description
14-13, supplies the