PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 404

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
Signed 16-bit load with index
SYNTAX
FUNCTION
DESCRIPTION
to 32 bits, and stores the result in rdest. If the memory address computed by rsrc1 + rsrc2 is not a multiple of 2, the
result of
endian depending on the current setting of the bytesex bit in the PCSW.
defined only for 32-bit loads and stores.
modification of the destination register and the occurrence of side effects. If the LSB of rguard is 1, rdest is written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of rguard is 0, rdest is not
changed and
EXAMPLES
r10 = 0xd00, r20 = 2, [0xd02] = 0x22,
[0xd03] = 0x11
r50 = 0, r40 = 0xd04, r30 = 0xfffffffc,
[0xd00] = 0x84, [0xd01] = 0x33
r60 = 1, r40 = 0xd04, r30 = 0xfffffffc,
[0xd00] = 0x84, [0xd01] = 0x33
r70 = 0xd01, r30 = 0xfffffffc
The
The result of an access by
The
[ IF rguard ] ild16r rsrc1 rsrc2 → rdest
if rguard then {
}
if PCSW.bytesex = LITTLE_ENDIAN then
else
temp<7:0> ← mem[(rsrc1 + rsrc2 +(1 ⊕ bs)]
temp<15:8> ← mem[(rsrc1 + rsrc2 + (0 ⊕ bs)]
rdest ← sign_ext16to32(temp<15:0>)
ild16r
ild16r
bs ← 1
bs ← 0
ild16r
Initial Values
ild16r
operation loads the 16-bit memory value from the address computed by rsrc1 + rsrc2, sign extends it
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
is undefined but no exception will be raised. This load operation is performed as little-endian or big-
has no side effects whatever.
ild16r
ild16r r10 r20 → r80
IF r50 ild16r r40 r30 → r90
IF r60 ild16r r40 r30 → r100
ild16r r70 r30 → r110
to the MMIO address aperture is undefined; access to the MMIO aperture is
Operation
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
r80 ← 0x00002211
no change, since guard is false
r100 ← 0xffff8433
r110 undefined, since 0xd01 +(–4) is not a
multiple of 2
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ild16 uld16 ild16d uld16d
uld16r ild16x uld16x
ATTRIBUTES
SEE ALSO
Result
ild16r
dmem
195
4, 5
No
—
2
3
A-106