PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 290

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
22.4.1.1
Figure 22-6
the PCI-XIO Bus. Examples of these devices are the Mi-
cron MT28F200C1 and the AMD 29LV400.
22.4.1.2
Figure 22-7
PCI-XIO Bus. Example devices are the Motorola
MC68HC681 DUART and the MC68HC901 Multi-Func-
tion Peripheral.
22.4.1.3
Figure 22-8
faced to the PCI-XIO Bus. An example device is the Intel
82091 Advanced Integrated Peripheral (AIP).
22-6
Figure 22-7. 8-bit 68K Bus Device Interface
Figure 22-8. 8-bit x86 / ISA Bus Device interface
Figure 22-6. 8-bit Flash EEPROM Interface
PCI_C/BE1#: IOWR#
PCI_C/BE0#: IORD#
PCI_C/BE1#: IOWR#
PCI_C/BE2: DS#
PCI_C/BE1#: IOWR#
PCI_AD[23:0]
PCI_C/BE0#: IORD#
shows a 68K bus I/O device interfaced to the
shows an 8-bit flash EEPROM interfaced to
shows an x86 or ISA bus I/O device inter-
PCI_AD[23:0]
Flash EEPROM
68K Bus I/O device
x86/ISA Bus I/O device
PCI_INTB#
PCI_CLK
PCI_INTB#
PCI_AD[16:0]
PCI_CLK
PCI_INTB#
PRELIMINARY SPECIFICATION
DS#
Chip Select
Address
R/W#
CLK
I/O Write Enable
Chip Select
Address
I/O Read Enable
BALE
Output Enable
Chip Select
Address
Write Enable
128Kx8 EEPROM
68K Bus Device
x86 or ISA Bus Device
22.4.1.4
Figure 22-9
to the PCI-XIO Bus. A 74FCT138 logic chip decodes up-
per bits PCI_AD[19-17] of the XIO bus address to gener-
ate the chip selects for the two EEPROMs. These bits
decode the address space into blocks of 128 KB. The ad-
dress range of each enable is shown on the enable lines.
Six spare chip selects are available for attaching up to six
more EEPROMs or to attach other devices. The
74FCT138 provides both decode of the address bits and
the AND function for the PCI_INTB# global chip enable
Data
Data
Data
shows two 8-bit flash EEPROMs interfaced
Multiple Flash EEPROM
PCI_AD[31:24]
PCI_AD[31:24]
PCI_AD[31:24]
Philips Semiconductors