EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 361

• Manufacturer Part Number: EP1S20F484C6N
• Description: IC STRATIX FPGA 20K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F484C6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 361
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Figure 1–23. V
Altera Corporation
July 2005
CCINT
Plane Partitioned for V
Thick V
Because of board constraints, you might not be able to partition a V
island. Instead, run a thick trace from the power supply to each V
The traces should be at least 20 mils thick.
In each of these three cases, you should filter each V
decoupling circuit shown in
high impedance at frequencies of 50 MHz or higher and a 10- F tantalum
parallel capacitor where the power enters the board. Decouple each V
pin with a 0.1- F and 0.001- F parallel combination of ceramic capacitors
located as close as possible to the Stratix or Stratix GX device. You can
connect the GNDA pins directly to the same ground plane as the device’s
digital ground.
CCA
Trace
CCA
Island
General-Purpose PLLs in Stratix & Stratix GX Devices
Figure
1–24. Place a ferrite bead that exhibits
Stratix Device Handbook, Volume 2
CCA
pin with a
CCA
CCA
1–51
pin.
CCA