EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 765

• Manufacturer Part Number: EP1S20F484C6N
• Description: IC STRATIX FPGA 20K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S20F484C6N

• Number Of Logic Elements/cells: 18460
• Number Of Labs/clbs: 1846
• Total Ram Bits: 1669248
• Number Of I /o: 361
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Figure 11–25. Jam Player Flow Diagram (Part 1 of 2)
Altera Corporation
July 2005
Read Instruction
from the Jam
File
Set TMS to 1
and Pulse TCK
Five Times
Set TMS to 0
and Pulse TCK
Set TMS to 1
and Pulse TCK
Three Times
Switch
EOF?
Start
End
T
Test-Logic-Reset
Test-Logic-Reset
Run-Test/Idle
F
Set TMS to 1
and Pulse TCK
Set TMS to 0
and Pulse TCK
Set TMS to 1
and Pulse TCK
Twice
Set TMS to 0
and Pulse TCK
Set TMS to 0
and Pulse TCK
Switch
Switch
Delay
Exit1-IR
Update-IR
Run-Test/Idle
Pause-IR
Run-Test/Idle
WAIT
T
Parse Argument
Set TMS to 1
and Pulse TCK
Twice
Set TMS to 0
and Pulse TCK
Twice
Set TMS to 0
and Pulse TCK
and Write TDI
Set TMS to 0
and Pulse TCK
and Write TDI
Case[]
EOF
F
Select-IR-Scan
IRSCAN
Shift-IR
Shift-IR
DRSCAN
Configuring Stratix & Stratix GX Devices
Shift-IR
Stratix Device Handbook, Volume 2
Parse Argument
Set TMS to 1
and Pulse TCK
Set TMS to 0
and Pulse TCK
Twice
Set TMS to 0
and Pulse TCK
and Write TDI
Continued on
Part 2 of
Flow Diagram
Select-DR-Scan
Shift-DR
Shift-DR
11–47