EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 284

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EP2AGX95EF29C4N

Manufacturer Part Number
EP2AGX95EF29C4N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX95EF29C4N

Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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Manufacturer
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Price
Part Number:
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Manufacturer:
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10 000
Part Number:
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Manufacturer:
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9–4
Power-On Reset Circuit and Configuration Pins Power Supply
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Power-On Reset Circuit
The following sections describe the power-on reset (POR) circuit and the power
supply for the configuration pins.
The POR circuit keeps the entire system in reset mode until the power supply voltage
levels have stabilized on power-up. After power-up, the device does not release
nSTATUS until the voltage levels are above the POR trip point of the device.
lists the voltages required for power-up in Arria II devices.
Table 9–3. Required Voltages for Arria II Devices
On power down for Arria II GX devices, brown-out occurs if V
the POR trip point and any of the V
8C drops below the threshold. On power down for Arria II GZ devices, brown-out
occurs if the V
threshold voltage.
In Arria II devices, you can select between a fast POR time or a standard POR time.
For Arria II GX devices, selection depends on the MSEL pin settings. For Arria II GZ
devices, selection depends on the PORSEL input pin. PORSEL = L is set as standard POR
time. PORSEL = H is set as fast POR time. Fast POR time is 4 ms < T
fast configuration time. Standard POR time is 100 ms < T
power-ramp rate.
Arria II GX
Arria II GZ
Devices
CC
V
V
, V
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
CCCB
CC
, V
CCAUX
, V
CCAUX
CCA_PLL
, V
, V
CCCB
CCCB
, V
CC
, V
, V
, V
CCPGM
CCPD
CCPGM
CC
, V
, and V
, and V
CCPD
, or V
Power-On Reset Circuit and Configuration Pins Power Supply
CCPD
CCIO
, or V
CCPD
Voltages
for I/O banks 3C or 8C
CCIO
voltages drops below the
voltages for I/O banks 3C or
POR
December 2010 Altera Corporation
< 300 ms for a lower
CC
ramps down below
POR
< 12 ms for a
Table 9–3

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