PIC16F877A-I/PT Microchip Technology Inc., PIC16F877A-I/PT Datasheet - Page 119

• Manufacturer Part Number: PIC16F877A-I/PT
• Description: 44 PIN, 7 KB FLASH, 368 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F877A-I/PT

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

11.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared and
the result loaded into the ADRES register. If the A/D
interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D
module will then be turned off, although the ADON bit
will remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
TABLE 11-2:
0Bh,8Bh,
10Bh,18Bh
0Ch
8Ch
1Eh
9Eh
1Fh
9Fh
85h
05h
89h
09h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Note 1: These registers/bits are not available on the 28-pin devices.
Address
2001 Microchip Technology Inc.
(1)
(1)
A/D Operation During SLEEP
INTCON
PIR1
PIE1
ADRESH A/D Result Register High Byte
ADRESL
ADCON0
ADCON1
TRISA
PORTA
TRISE
PORTE
Name
REGISTERS/BITS ASSOCIATED WITH A/D
A/D Result Register Low Byte
PSPIF
PSPIE
ADCS1
ADFM
Bit 7
GIE
IBF
—
—
—
(1)
(1)
ADCS0 CHS2
ADIE
Bit 6
PEIE
ADIF
OBF
—
—
—
—
PORTA Data Direction Register
PORTA Data Latch when written: PORTA pins when read
RCIE
IBOV
Bit 5
RCIF
T0IE
—
—
PSPMODE
CHS1
Bit 4
INTE
TXIE
TXIF
—
—
PCFG3
SSPIF
SSPIE
CHS0
Bit 3
RBIE
—
—
Turning off the A/D places the A/D module in its lowest
current consumption state.
11.6
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off, and
any conversion is aborted. All A/D input pins are con-
figured as analog inputs.
The value that is in the ADRESH:ADRESL registers is
not
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
Note:
GO/DONE
PORTE Data Direction bits
CCP1IE
CCP1IF
PCFG2
Bit 2
T0IF
RE2
modified
Effects of a RESET
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To allow the con-
version to occur during SLEEP, ensure the
SLEEP instruction immediately follows the
instruction that sets the GO/DONE bit.
TMR2IF TMR1IF 0000 0000 0000 0000
TMR2IE TMR1IE 0000 0000 0000 0000
PCFG1
Bit 1
INTF
RE1
—
for
PCFG0
ADON
a
Bit 0
RBIF
RE0
PIC16F87X
Power-on
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
--0- 0000
--11 1111 --11 1111
--0x 0000 --0u 0000
0000 -111 0000 -111
---- -xxx ---- -uuu
Value on
POR,
BOR
DS30292C-page 117
Reset.
--0- 0000
Value on
MCLR,
WDT
The