PIC16F877A-I/PT Microchip Technology Inc., PIC16F877A-I/PT Datasheet - Page 203

• Manufacturer Part Number: PIC16F877A-I/PT
• Description: 44 PIN, 7 KB FLASH, 368 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F877A-I/PT

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

I
I
ICEPIC In-Circuit Emulator .............................................. 144
ID Locations ............................................................. 119, 133
In-Circuit Serial Programming (ICSP) ...................... 119, 134
INDF ................................................................................... 17
INDF Register .........................................................15, 16, 27
Indirect Addressing ............................................................ 27
Instruction Format ............................................................ 135
Instruction Set .................................................................. 135
2
2
C Module Address Register, SSPADD ............................ 73
C Slave Mode .................................................................. 74
2001 Microchip Technology Inc.
Master Mode Operation ............................................. 79
Master Mode START Condition ................................. 80
Master Mode Transmission ........................................ 82
Master Mode Transmit Sequence .............................. 79
Multi-Master Communication ..................................... 89
Multi-master Mode ..................................................... 78
Operation ................................................................... 73
Repeat START Condition Timing ............................... 81
Slave Mode ................................................................ 74
Slave Reception ......................................................... 74
Slave Transmission .................................................... 75
SSPBUF ..................................................................... 73
STOP Condition Receive or Transmit Timing ............ 87
STOP Condition Timing ............................................. 87
Waveforms for 7-bit Reception .................................. 75
Waveforms for 7-bit Transmission ............................. 76
FSR Register ............................................................. 12
ADDLW .................................................................... 137
ADDWF .................................................................... 137
ANDLW .................................................................... 137
ANDWF .................................................................... 137
BCF .......................................................................... 137
BSF .......................................................................... 137
BTFSC ..................................................................... 137
BTFSS ..................................................................... 137
CALL ........................................................................ 138
CLRF ........................................................................ 138
CLRW ...................................................................... 138
CLRWDT .................................................................. 138
COMF ...................................................................... 138
DECF ....................................................................... 138
DECFSZ ................................................................... 139
GOTO ...................................................................... 139
INCF ......................................................................... 139
INCFSZ .................................................................... 139
IORLW ..................................................................... 139
IORWF ..................................................................... 139
MOVF ....................................................................... 140
MOVLW ................................................................... 140
MOVWF ................................................................... 140
NOP ......................................................................... 140
RETFIE .................................................................... 140
RETLW .................................................................... 140
RETURN .................................................................. 141
RLF .......................................................................... 141
RRF .......................................................................... 141
SLEEP ..................................................................... 141
SUBLW .................................................................... 141
SUBWF .................................................................... 141
SWAPF .................................................................... 142
XORLW .................................................................... 142
XORWF .................................................................... 142
Summary Table ........................................................ 136
Block Diagram .................................................... 73
INT Interrupt (RB0/INT). See Interrupt Sources
INTCON ............................................................................. 17
INTCON Register ............................................................... 20
Inter-Integrated Circuit (I
Internal Sampling Switch (Rss) Impedence ..................... 114
Interrupt Sources ......................................................119, 129
Interrupts
Interrupts, Context Saving During .................................... 130
Interrupts, Enable Bits
Interrupts, Flag Bits
K
K
L
Loading of PC .................................................................... 26
M
Master Clear (MCLR) ........................................................7, 8
Memory Organization
MPLAB C17 and MPLAB C18 C Compilers .................... 143
MPLAB ICD In-Circuit Debugger ..................................... 145
MPLAB ICE High Performance Universal In-Circuit
Emulator with MPLAB IDE ............................................... 144
MPLAB Integrated Development Environment Software . 143
MPLINK Object Linker/MPLIB Object Librarian ............... 144
Multi-Master Communication ............................................. 89
Multi-Master Mode ............................................................. 78
EE
L
GIE Bit ....................................................................... 20
INTE Bit ..................................................................... 20
INTF Bit ..................................................................... 20
PEIE Bit ..................................................................... 20
RBIE Bit ..................................................................... 20
RBIF Bit ................................................................20, 31
T0IE Bit ...................................................................... 20
T0IF Bit ...................................................................... 20
Block Diagram ......................................................... 129
Interrupt-on-Change (RB7:RB4 ) ............................... 31
RB0/INT Pin, External ....................................... 7, 8, 130
TMR0 Overflow ........................................................ 130
USART Receive/Transmit Complete ......................... 95
Bus Collision Interrupt ................................................ 24
Synchronous Serial Port Interrupt .............................. 22
Global Interrupt Enable (GIE Bit) ........................20, 129
Interrupt-on-Change (RB7:RB4) Enable
Interrupt-on-Change (RB7:RB4) Enable
Peripheral Interrupt Enable (PEIE Bit) ....................... 20
RB0/INT Enable (INTE Bit) ........................................ 20
TMR0 Overflow Enable (T0IE Bit) ............................. 20
Interrupt-on-Change (RB7:RB4) Flag
Interrupt-on-Change (RB7:RB4) Flag
RB0/INT Flag (INTF Bit) ............................................ 20
TMR0 Overflow Flag (T0IF Bit) ...........................20, 130
MCLR Reset, Normal Operation ............... 123, 125, 126
MCLR Reset, SLEEP ................................ 123, 125, 126
Data Memory ............................................................. 12
Program Memory ....................................................... 11
OQ
Evaluation and Programming Tools ................... 146
(RBIE Bit) ................................................. 130
(RBIE Bit) ................................................... 20
(RBIF Bit) ................................................. 130
(RBIF Bit) ..............................................20, 31
2
C) .............................................. 65
PIC16F87X
DS30292C-page 201