PIC16F877A-I/PT Microchip Technology Inc., PIC16F877A-I/PT Datasheet - Page 21

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PIC16F877A-I/PT

Manufacturer Part Number
PIC16F877A-I/PT
Description
44 PIN, 7 KB FLASH, 368 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F877A-I/PT

A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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2.2.2.2
The OPTION_REG Register is a readable and writable
register, which contains various control bits to configure
the TMR0 prescaler/WDT postscaler (single assign-
able register known also as the prescaler), the External
INT Interrupt, TMR0 and the weak pull-ups on PORTB.
REGISTER 2-2:
2001 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note:
OPTION_REG Register
When using low voltage ICSP programming (LVP) and the pull-ups on PORTB are enabled, bit 3
in the TRISB register must be cleared to disable the pull-up on RB3 and ensure the proper oper-
ation of the device
OPTION_REG REGISTER (ADDRESS 81h, 181h)
RBPU: PORTB Pull-up Enable bit
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Bit Value TMR0 Rate WDT Rate
bit 7
Legend:
R = Readable bit
- n = Value at POR
R/W-1
RBPU
000
001
010
011
100
101
110
111
INTEDG
R/W-1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0CS
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
W = Writable bit
’1’ = Bit is set
R/W-1
T0SE
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer.
PSA
R/W-1
PS2
PIC16F87X
x = Bit is unknown
R/W-1
PS1
DS30292C-page 19
R/W-1
PS0
bit 0

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