PIC16F877A-I/PT Microchip Technology Inc., PIC16F877A-I/PT Datasheet - Page 96

• Manufacturer Part Number: PIC16F877A-I/PT
• Description: 44 PIN, 7 KB FLASH, 368 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F877A-I/PT

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F87X
9.3
For standard-mode I
resistors R
lowing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices
The supply voltage limits the minimum value of resistor
R
V
FIGURE 9-27:
DS30292C-page 94
OL
p
(input current + leakage current)
, due to the specified minimum sink current of 3 mA at
Note: I
max = 0.4V, for the specified output stages. For
Connection Considerations for
I
2
C Bus
p
connected.
2
C devices with input levels related to V
and R
s
in Figure 9-27 depend on the fol-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
SDA
SCL
R
p
R
DD
p
must have one common supply line to which the pull-up resistor is also
R
s
V
DD
DEVICE
R
+ 10%
s
example, with a supply voltage of V
V
V
desired noise margin of 0.1V
the maximum value of R
and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R
(Figure 9-27).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I
OL
DD
max = 0.4V at 3 mA, R
as a function of R
2
C BUS
p
due to the specified rise time
p
2
s
p
C mode (master or slave).
is shown in Figure 9-27. The
. Series resistors are optional
C
2001 Microchip Technology Inc.
min = (5.5-0.4)/0.003 = 1.7 k
b
=10 - 400 pF
DD
for the low level limits
DD
= 5V±10% and